Capacity-Latency Tradeoffs in CXL Memory Expander at Hyperscale.

Brian Morris

Haneul Park Grant Ayers Nam Sung Kim Philip Levis Brian Morris Capacity-Latency Tradeoffs in CXL Memory Expander at Hyperscale. 2026 January - June 122-125 25 IEEE Comput. Archit. Lett. 1 https://doi.org/10.1109/LCA.2026.3676988 db/journals/cal/cal25.html#ParkAKLM26 streams/journals/cal

Padmapriya Duraisamy Wei Xu Scott Hare Ravi Rajwar David E. Culler Zhiyi Xu Jianing Fan Christopher Kennelly Bill McCloskey Danijela Mijailovic Brian Morris Chiranjit Mukherjee Jingliang Ren Greg Thelen Paul Turner Carlos Villavieja Parthasarathy Ranganathan Amin Vahdat Towards an Adaptable Systems Architecture for Memory Tiering at Warehouse-Scale. 727-741 2023 ASPLOS (3) https://doi.org/10.1145/3582016.3582031 https://www.wikidata.org/entity/Q130932413 conf/asplos/2023-3 db/conf/asplos/asplos2023-3.html#DuraisamyXHRCXF23

Irma Esmer Papazian Sailesh Kottapalli Jeff Baxter Jeff Chamberlain Geetha Vedaraman Brian Morris Ivy Bridge Server: A Converged Design. 16-25 2015 35 IEEE Micro 2 https://doi.org/10.1109/MM.2015.33 http://doi.ieeecomputersociety.org/10.1109/MM.2015.33 db/journals/micro/micro35.html#PapazianKBCVM15

Grant Ayers Jeff Baxter Jeff Chamberlain David E. Culler Padmapriya Duraisamy Jianing Fan Scott Hare Chris KennellyChristopher Kennelly Nam Sung Kim Sailesh Kottapalli Philip Levis Bill McCloskey Danijela Mijailovic Chiranjit Mukherjee Irma Esmer Papazian Haneul Park Ravi Rajwar Parthasarathy Ranganathan Jingliang Ren Greg Thelen Paul Turner Amin Vahdat Geetha Vedaraman Carlos Villavieja Wei Xu Zhiyi Xu