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Object Recognition System-on-Chip Using the Support Vector Machines

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  • Published: 22 May 2005
  • Volume 2005, article number 941303 (2005)
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EURASIP Journal on Advances in Signal Processing Aims and scope Submit manuscript
Object Recognition System-on-Chip Using the Support Vector Machines
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  • Roberto Reyna-Rojas1,
  • Dominique Houzet2,
  • Daniela Dragomirescu1,
  • Florent Carlier2 &
  • …
  • Salim Ouadjaout2 
  • 1917 Accesses

  • 8 Citations

  • 6 Altmetric

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Abstract

The first aim of this work is to propose the design of a system-on-chip (SoC) platform dedicated to digital image and signal processing, which is tuned to implement efficiently multiply-and-accumulate (MAC) vector/matrix operations. The second aim of this work is to implement a recent promising neural network method, namely, the support vector machine (SVM) used for real-time object recognition, in order to build a vision machine. With such a reconfigurable and programmable SoC platform, it is possible to implement any SVM function dedicated to any object recognition problem. The final aim is to obtain an automatic reconfiguration of the SoC platform, based on the results of the learning phase on an objects' database, which makes it possible to recognize practically any object without manual programming. Recognition can be of any kind that is from image to signal data. Such a system is a general-purpose automatic classifier. Many applications can be considered as a classification problem, but are usually treated specifically in order to optimize the cost of the implemented solution. The cost of our approach is more important than a dedicated one, but in a near future, hundreds of millions of gates will be common and affordable compared to the design cost. What we are proposing here is a general-purpose classification neural network implemented on a reconfigurable SoC platform. The first version presented here is limited in size and thus in object recognition performances, but can be easily upgraded according to technology improvements.

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Author information

Authors and Affiliations

  1. Laboratory for Analysis and Architecture of Systems (LAAS), CNRS, 7 avenue du Colonel Roche, Toulouse Cedex 4, 31077, France

    Roberto Reyna-Rojas & Daniela Dragomirescu

  2. The Rennes Institute of Electronics and Telecommunications (IETR) (UMR CNRS 6164), INSA, 20 avenue des Buttes de Coësmes, Rennes Cedex, 35053, France

    Dominique Houzet, Florent Carlier & Salim Ouadjaout

Authors
  1. Roberto Reyna-Rojas
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  2. Dominique Houzet
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  3. Daniela Dragomirescu
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  4. Florent Carlier
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  5. Salim Ouadjaout
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Corresponding author

Correspondence to Roberto Reyna-Rojas.

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Open Access This article is distributed under the terms of the Creative Commons Attribution 2.0 International License ( https://creativecommons.org/licenses/by/2.0 ), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Reyna-Rojas, R., Houzet, D., Dragomirescu, D. et al. Object Recognition System-on-Chip Using the Support Vector Machines. EURASIP J. Adv. Signal Process. 2005, 941303 (2005). https://doi.org/10.1155/ASP.2005.993

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  • Received: 16 September 2003

  • Revised: 06 June 2004

  • Published: 22 May 2005

  • DOI: https://doi.org/10.1155/ASP.2005.993

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Keywords and phrases

  • parallel architecture
  • pattern recognition
  • support vector machines
  • hardware design language
  • systems-on-programmable-chip and system-on-chip platforms

Associated Content

Part of a collection:

Prototyping for Machine Perception on a Chip

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