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A dual\u2010input single\u2010output (DISO) DC\u2013DC converter with source fault tolerance is proposed in this paper. In the literature, there are many topologies in this area of work; however, most of them are based on time\u2010sharing control. In this control scheme, one input source is contributed to the load, and others are kept idle in a particular duty interval; hence, this control scheme leads to underutilization of the converter. The proposed converter is designed to circumvent these challenges and can produce boost, buck\u2013boost, and buck operations. And also, it has a source fault feature for achieving the preserved output voltage under source V<jats:sub>1<\/jats:sub> or V<jats:sub>2<\/jats:sub> failure conditions. A 200\u2010W prototype is designed, and the feasibility of the proposed converter is validated through simulation and experimental results.<\/jats:p>","DOI":"10.1002\/cta.3691","type":"journal-article","created":{"date-parts":[[2023,6,2]],"date-time":"2023-06-02T08:41:35Z","timestamp":1685695295000},"page":"5210-5232","update-policy":"https:\/\/doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Two\u2010input single\u2010output converter with preserved output voltage under source fault"],"prefix":"10.1002","volume":"51","author":[{"given":"Dhananjaya","family":"M","sequence":"first","affiliation":[{"name":"Department of EEE ANITS  Visakhapatnam India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jagabar Sathik","family":"M","sequence":"additional","affiliation":[{"name":"Renewable Energy Lab Prince Sultan University  Riyadh Saudi Arabia"},{"name":"SRM Institute of Science and Technology, Kattankulathur Campus  Chennai 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