{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T02:22:36Z","timestamp":1649038956686},"reference-count":16,"publisher":"Elsevier BV","issue":"1","license":[{"start":{"date-parts":[[1987,1,1]],"date-time":"1987-01-01T00:00:00Z","timestamp":536457600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Microprocessors and Microsystems"],"published-print":{"date-parts":[[1987,1]]},"DOI":"10.1016\/0141-9331(87)90327-9","type":"journal-article","created":{"date-parts":[[2003,3,15]],"date-time":"2003-03-15T06:33:26Z","timestamp":1047710006000},"page":"35-40","source":"Crossref","is-referenced-by-count":7,"title":["Knowledge-based system tool for high-level BIST design"],"prefix":"10.1016","volume":"11","author":[{"given":"NA","family":"Jones","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"K","family":"Baker","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"78","reference":[{"key":"10.1016\/0141-9331(87)90327-9_BIB1","series-title":"Proc. 1983 ITC IEEE","first-page":"260","article-title":"Selftesting in bit serial VLSI parts: high fault coverage at low cost","author":"Murray","year":"1983"},{"key":"10.1016\/0141-9331(87)90327-9_BIB2","series-title":"Electronics Week","first-page":"17","article-title":"Plessey custom chips will test themselves","author":"Smith","year":"1985"},{"key":"10.1016\/0141-9331(87)90327-9_BIB3","series-title":"IEE Colloq. DFT","article-title":"Global testability tools for CATE","author":"Croft","year":"1985"},{"issue":"No 4","key":"10.1016\/0141-9331(87)90327-9_BIB4","doi-asserted-by":"crossref","first-page":"56","DOI":"10.1109\/MDT.1985.294746","article-title":"A knowledge-based system for designing testable VLSI chips","volume":"Vol 2","author":"Abadir","year":"1985","journal-title":"IEEE Des. Test Comput."},{"key":"10.1016\/0141-9331(87)90327-9_BIB5","series-title":"Proc. 22nd Design Automation Conf.","article-title":"The ADAM advanced design automation system: overview, planner and natural-language interface","author":"Granacki","year":"1985"},{"key":"10.1016\/0141-9331(87)90327-9_BIB6","series-title":"1985 Int. Symp. VLSI Technology, Systems and Applications","article-title":"EXCAT: an expert system for testable design of VLSI","author":"Mangir","year":"1985"},{"issue":"No 1","key":"10.1016\/0141-9331(87)90327-9_BIB7","doi-asserted-by":"crossref","first-page":"45","DOI":"10.1109\/MDT.1986.294938","article-title":"An automatic DFT system for the SILC silicon compiler","volume":"Vol 3","author":"Fung","year":"1986","journal-title":"IEEE Des. Test Comput."},{"key":"10.1016\/0141-9331(87)90327-9_BIB8","author":"Bobrow","year":"1983","journal-title":"The LOOPS manual Xerox"},{"key":"10.1016\/0141-9331(87)90327-9_BIB9","unstructured":"TMS32010 users guide Texas Instruments, Houston, TX, USA"},{"key":"10.1016\/0141-9331(87)90327-9_BIB10","volume":"Vol 3","author":"Cohen","year":"1982"},{"key":"10.1016\/0141-9331(87)90327-9_BIB11","unstructured":"Tate, A \u2018INTERPLAN: a plan generation system which can deal with interactions between goals\u2019 Memorandum MIP-R-109 Machine Intelligence Research Unit, University of Edinburgh, UK"},{"key":"10.1016\/0141-9331(87)90327-9_BIB12","article-title":"Achieving several goals simultaneously","volume":"8","author":"Waldinger","year":"1977"},{"key":"10.1016\/0141-9331(87)90327-9_BIB13","doi-asserted-by":"crossref","first-page":"111","DOI":"10.1016\/0004-3702(81)90007-2","article-title":"Planning with constraints","volume":"16","author":"Stefik","year":"1981","journal-title":"Artificial Intelligence"},{"key":"10.1016\/0141-9331(87)90327-9_BIB14","unstructured":"Tate, A \u2018Project planning using a hierarchic non-linear planner\u2019 Research Report No 25 Dept of Artificial Intelligence, University of Edinburgh, UK"},{"key":"10.1016\/0141-9331(87)90327-9_BIB15","first-page":"72","article-title":"Digital signal processor nimbly jumps over CPU overhead hurdles","author":"Pickvance","year":"1984","journal-title":"Electron. Des."},{"key":"10.1016\/0141-9331(87)90327-9_BIB16","series-title":"1984 Int. Test Conf.","first-page":"20","article-title":"An analysis of the economics of self-test","author":"Varma","year":"1984"}],"container-title":["Microprocessors and Microsystems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0141933187903279?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:0141933187903279?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,3,25]],"date-time":"2019-03-25T07:26:27Z","timestamp":1553498787000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/0141933187903279"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1987,1]]},"references-count":16,"journal-issue":{"issue":"1","published-print":{"date-parts":[[1987,1]]}},"alternative-id":["0141933187903279"],"URL":"https:\/\/doi.org\/10.1016\/0141-9331(87)90327-9","relation":{},"ISSN":["0141-9331"],"issn-type":[{"value":"0141-9331","type":"print"}],"subject":[],"published":{"date-parts":[[1987,1]]}}}