{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,14]],"date-time":"2026-01-14T00:21:56Z","timestamp":1768350116655,"version":"3.49.0"},"reference-count":26,"publisher":"Elsevier BV","license":[{"start":{"date-parts":[[2016,11,1]],"date-time":"2016-11-01T00:00:00Z","timestamp":1477958400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61370188"],"award-info":[{"award-number":["61370188"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["elsevier.com","sciencedirect.com"],"crossmark-restriction":true},"short-container-title":["Microprocessors and Microsystems"],"published-print":{"date-parts":[[2016,11]]},"DOI":"10.1016\/j.micpro.2016.07.008","type":"journal-article","created":{"date-parts":[[2016,7,23]],"date-time":"2016-07-23T01:24:28Z","timestamp":1469237068000},"page":"209-215","update-policy":"https:\/\/doi.org\/10.1016\/elsevier_cm_policy","source":"Crossref","is-referenced-by-count":19,"special_numbering":"PA","title":["Efficient FPGA implementation of modular multiplication based on Montgomery algorithm"],"prefix":"10.1016","volume":"47","author":[{"given":"Yatao","family":"Yang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chao","family":"Wu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zichen","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Junming","family":"Yang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"78","reference":[{"key":"10.1016\/j.micpro.2016.07.008_bib0001","series-title":"2015 25th International Conference on Field Programmable Logic and Applications (FPL 2015)","first-page":"1","article-title":"High speed ECC implementation on FPGA over GF(2m)","author":"Khan","year":"2015"},{"key":"10.1016\/j.micpro.2016.07.008_bib0002","series-title":"2013 International Conference on Applied Electronics","first-page":"1","article-title":"On the implementation of a lightweight generic FPGA ECC crypto-core over GF(p)","author":"Schramm","year":"2013"},{"key":"10.1016\/j.micpro.2016.07.008_bib0003","series-title":"2015 IEEE Region 10 Conference (TENCON 2015)","first-page":"1","article-title":"FPGA implementation of high speed scalar multiplication for ECC in GF(p)","author":"Shylashree","year":"2015"},{"key":"10.1016\/j.micpro.2016.07.008_bib0004","series-title":"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS 2013)","first-page":"493","article-title":"An FPGA implementation of NIST 256 prime field ECC processor","author":"Marzouqi","year":"2013"},{"key":"10.1016\/j.micpro.2016.07.008_bib0005","series-title":"2015 International Conference on Advances in Computing, Communications and Informatics(ICACCI 2015)","first-page":"549","article-title":"FPGA implementation of multiplication algorithms for ECC","author":"Kodali","year":"2015"},{"key":"10.1016\/j.micpro.2016.07.008_bib0006","series-title":"2014 2nd International Conference on Emerging Technology Trends in Electronics, Communication and Networking (ET2ECN 2014)","first-page":"1","article-title":"FPGA implementation of multipliers for ECC","author":"Kodali","year":"2014"},{"key":"10.1016\/j.micpro.2016.07.008_bib0007","series-title":"2012 International Conference on Computer Science and Information Processing (CSIP 2012)","first-page":"343","article-title":"An FPGA based processor for elliptic curve cryptography","author":"Cui","year":"2012"},{"key":"10.1016\/j.micpro.2016.07.008_bib0008","series-title":"2014 2nd International Conference on Emerging Technology Trends in Electronics, Communication and Networking (ET2ECN 2014)","first-page":"1","article-title":"Montgomery implantation of ECC over RSA on FPGA for public key cryptography application","author":"Bhadada","year":"2014"},{"key":"10.1016\/j.micpro.2016.07.008_bib0009","series-title":"2013 IEEE Conference on Information & Communication Technologies (ICT 2013)","first-page":"468","article-title":"FPGA implementation of low bandwidth ECC code","author":"Sivan","year":"2013"},{"issue":"4-5","key":"10.1016\/j.micpro.2016.07.008_bib0010","doi-asserted-by":"publisher","first-page":"302","DOI":"10.1016\/j.micpro.2015.03.007","article-title":"FPGA-based many-core system-on-chip design","volume":"39","author":"Bakloutia","year":"2015","journal-title":"Microprocess. Microsyst."},{"key":"10.1016\/j.micpro.2016.07.008_bib0011","series-title":"2014 International Conference on Advances in Computing, Communications and Informatics (ICACCI 2014)","first-page":"1815","article-title":"FPGA implementation of energy efficient multiplication over GF(2m) for ECC","author":"Kodali","year":"2014"},{"key":"10.1016\/j.micpro.2016.07.008_bib0012","series-title":"IEEE Second International Workshop on Education Technology and Computer Science","first-page":"173","article-title":"High-throughput fpga implementation of 256-bit montgomery modular multiplier","author":"Gong","year":"2010"},{"issue":"7","key":"10.1016\/j.micpro.2016.07.008_bib0013","doi-asserted-by":"publisher","first-page":"923","DOI":"10.1109\/TC.2010.247","article-title":"New hardware architectures for Montgomery modular multiplication algorithm","volume":"60","author":"Huang","year":"2011","journal-title":"IEEE Trans. Comput."},{"key":"10.1016\/j.micpro.2016.07.008_bib0014","series-title":"16th International Symposium on Progress in VLSI Design and Test(VDAT 2012)","first-page":"370","article-title":"Efficient fpga implementation of montgomery multiplier using dsp blocks","author":"Mondal","year":"2012"},{"key":"10.1016\/j.micpro.2016.07.008_bib0015","series-title":"Efficient multiplier for pairings over barreto-naehrig curves on virtex-6 fpga","author":"Brinci","year":"2013"},{"issue":"4","key":"10.1016\/j.micpro.2016.07.008_bib0016","doi-asserted-by":"publisher","first-page":"270","DOI":"10.1016\/j.vlsi.2010.08.001","article-title":"Optimized FPGA-based elliptic curve cryptography processor for high-speed applications","volume":"44","author":"Jarvinen","year":"2011","journal-title":"Integr. VLSI J."},{"issue":"7","key":"10.1016\/j.micpro.2016.07.008_bib0017","doi-asserted-by":"publisher","first-page":"480","DOI":"10.1016\/j.micpro.2015.07.005","article-title":"An ultra-high throughput and fully pipelined implementation of AES algorithm on FPGA","volume":"39","author":"Soltania","year":"2015","journal-title":"Microprocess. Microsyst."},{"issue":"2","key":"10.1016\/j.micpro.2016.07.008_bib0018","doi-asserted-by":"publisher","first-page":"97","DOI":"10.1016\/j.micpro.2015.02.003","article-title":"Review of elliptic curve cryptography processor designs","volume":"39","author":"Marzouqi","year":"2015","journal-title":"Microprocess. Microsyst."},{"issue":"2","key":"10.1016\/j.micpro.2016.07.008_bib0019","doi-asserted-by":"publisher","first-page":"434","DOI":"10.1109\/TVLSI.2015.2409113","article-title":"Low-cost high-performance VLSI architecture for Montgomery modular multiplication","volume":"24","author":"Kuang","year":"2016","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"issue":"9","key":"10.1016\/j.micpro.2016.07.008_bib0020","doi-asserted-by":"publisher","first-page":"1710","DOI":"10.1109\/TVLSI.2014.2355854","article-title":"High-throughput modular multiplication and exponentiation algorithms using multibit-scan\u2013multibit-shift technique","volume":"23","author":"Rezai","year":"2015","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"10.1016\/j.micpro.2016.07.008_bib0021","series-title":"2015 International Seminar on Intelligent Technology and Its Applications(ISITIA 2015)","first-page":"99","article-title":"Hardware implementation of Montgomery modular multiplication algorithm using iterative architecture","author":"Renardy","year":"2015"},{"key":"10.1016\/j.micpro.2016.07.008_bib0022","series-title":"2015 International Telecommunication Networks and Applications Conference (lTNAC 2015)","first-page":"191","article-title":"FPGA-based efficient modular multiplication for elliptic curve cryptography","author":"Hossain","year":"2015"},{"key":"10.1016\/j.micpro.2016.07.008_bib0023","series-title":"17th International Parallel and Distributed Processing Symposium(IPDPS 2003)","first-page":"184b","article-title":"Hardware implementation of a montgomery modular multiplier in a systolic array","author":"Ors","year":"2003"},{"issue":"3","key":"10.1016\/j.micpro.2016.07.008_bib0024","doi-asserted-by":"publisher","first-page":"376","DOI":"10.1109\/12.210181","article-title":"Systolic modular multiplication","volume":"42","author":"Walter","year":"1993","journal-title":"IEEE Trans. Comput."},{"key":"10.1016\/j.micpro.2016.07.008_bib0025","series-title":"Pairing-Based Cryptography (Pairing 2012). May 2012","first-page":"141","article-title":"Core based architecture to speed up optimal ate pairing on fpga platform","author":"Ghosh","year":"2013"},{"issue":"3","key":"10.1016\/j.micpro.2016.07.008_bib0026","doi-asserted-by":"publisher","first-page":"434","DOI":"10.1109\/TVLSI.2012.2188655","article-title":"Secure dualcore cryptoprocessor for pairings over barreto-naehrig curves on fpga platform","volume":"21","author":"Ghosh","year":"2013","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."}],"container-title":["Microprocessors and Microsystems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S0141933116300916?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S0141933116300916?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2018,9,10]],"date-time":"2018-09-10T04:50:33Z","timestamp":1536555033000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S0141933116300916"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,11]]},"references-count":26,"alternative-id":["S0141933116300916"],"URL":"https:\/\/doi.org\/10.1016\/j.micpro.2016.07.008","relation":{},"ISSN":["0141-9331"],"issn-type":[{"value":"0141-9331","type":"print"}],"subject":[],"published":{"date-parts":[[2016,11]]},"assertion":[{"value":"Elsevier","name":"publisher","label":"This article is maintained by"},{"value":"Efficient FPGA implementation of modular multiplication based on Montgomery algorithm","name":"articletitle","label":"Article Title"},{"value":"Microprocessors and Microsystems","name":"journaltitle","label":"Journal Title"},{"value":"https:\/\/doi.org\/10.1016\/j.micpro.2016.07.008","name":"articlelink","label":"CrossRef DOI link to publisher maintained version"},{"value":"article","name":"content_type","label":"Content Type"},{"value":"\u00a9 2016 Elsevier B.V. All rights reserved.","name":"copyright","label":"Copyright"}]}}