{"id":"https://openalex.org/W1991405422","doi":"https://doi.org/10.1109/ipdpsw.2013.165","title":"Mis-speculation-Driven Compiler Framework for Aggressive Loop Automatic Parallelization","display_name":"Mis-speculation-Driven Compiler Framework for Aggressive Loop Automatic Parallelization","publication_year":2013,"publication_date":"2013-05-01","ids":{"openalex":"https://openalex.org/W1991405422","doi":"https://doi.org/10.1109/ipdpsw.2013.165","mag":"1991405422"},"language":"en","primary_location":{"id":"doi:10.1109/ipdpsw.2013.165","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdpsw.2013.165","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000282384","display_name":"Jin Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jin Lin","raw_affiliation_strings":["Mobile Computing and Compilers, Intel Corporation, Santa, CA, U.S.A","Mobile Comput. & Compilers, Intel Corp., Santa Clara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mobile Computing and Compilers, Intel Corporation, Santa, CA, U.S.A","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Mobile Comput. & Compilers, Intel Corp., Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101131112","display_name":"Xinmin Tian","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xinmin Tian","raw_affiliation_strings":["Mobile Computing and Compilers, Intel Corporation, Santa, CA, U.S.A","Mobile Comput. & Compilers, Intel Corp., Santa Clara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mobile Computing and Compilers, Intel Corporation, Santa, CA, U.S.A","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Mobile Comput. & Compilers, Intel Corp., Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112499832","display_name":"John N. Ng","orcid":"https://orcid.org/0009-0005-3161-0615"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John Ng","raw_affiliation_strings":["Mobile Computing and Compilers, Intel Corporation, Santa, CA, U.S.A","Mobile Comput. & Compilers, Intel Corp., Santa Clara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mobile Computing and Compilers, Intel Corporation, Santa, CA, U.S.A","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Mobile Comput. & Compilers, Intel Corp., Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"13","issue":null,"first_page":"1159","last_page":"1168"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10126","display_name":"Logic, programming, and type systems","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.8702080845832825},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8450902700424194},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7376058101654053},{"id":"https://openalex.org/keywords/control-flow","display_name":"Control flow","score":0.6148532032966614},{"id":"https://openalex.org/keywords/speculation","display_name":"Speculation","score":0.5739908814430237},{"id":"https://openalex.org/keywords/automatic-parallelization","display_name":"Automatic parallelization","score":0.4979441165924072},{"id":"https://openalex.org/keywords/loop-fusion","display_name":"Loop fusion","score":0.4762432873249054},{"id":"https://openalex.org/keywords/optimizing-compiler","display_name":"Optimizing compiler","score":0.4760865271091461},{"id":"https://openalex.org/keywords/loop-fission","display_name":"Loop fission","score":0.46443045139312744},{"id":"https://openalex.org/keywords/data-flow-diagram","display_name":"Data flow diagram","score":0.4584161937236786},{"id":"https://openalex.org/keywords/vectorization","display_name":"Vectorization (mathematics)","score":0.44951772689819336},{"id":"https://openalex.org/keywords/code-generation","display_name":"Code generation","score":0.44729241728782654},{"id":"https://openalex.org/keywords/speculative-execution","display_name":"Speculative execution","score":0.44657909870147705},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.43400490283966064},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.41191181540489197},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17641302943229675},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.14522841572761536}],"concepts":[{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.8702080845832825},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8450902700424194},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7376058101654053},{"id":"https://openalex.org/C160191386","wikidata":"https://www.wikidata.org/wiki/Q868299","display_name":"Control flow","level":2,"score":0.6148532032966614},{"id":"https://openalex.org/C47941915","wikidata":"https://www.wikidata.org/wiki/Q107885","display_name":"Speculation","level":2,"score":0.5739908814430237},{"id":"https://openalex.org/C164833996","wikidata":"https://www.wikidata.org/wiki/Q2323839","display_name":"Automatic parallelization","level":3,"score":0.4979441165924072},{"id":"https://openalex.org/C82653869","wikidata":"https://www.wikidata.org/wiki/Q6675821","display_name":"Loop fusion","level":3,"score":0.4762432873249054},{"id":"https://openalex.org/C190902152","wikidata":"https://www.wikidata.org/wiki/Q1325106","display_name":"Optimizing compiler","level":3,"score":0.4760865271091461},{"id":"https://openalex.org/C134718785","wikidata":"https://www.wikidata.org/wiki/Q6675821","display_name":"Loop fission","level":3,"score":0.46443045139312744},{"id":"https://openalex.org/C489000","wikidata":"https://www.wikidata.org/wiki/Q747385","display_name":"Data flow diagram","level":2,"score":0.4584161937236786},{"id":"https://openalex.org/C41681595","wikidata":"https://www.wikidata.org/wiki/Q7917855","display_name":"Vectorization (mathematics)","level":2,"score":0.44951772689819336},{"id":"https://openalex.org/C133162039","wikidata":"https://www.wikidata.org/wiki/Q1061077","display_name":"Code generation","level":3,"score":0.44729241728782654},{"id":"https://openalex.org/C141331961","wikidata":"https://www.wikidata.org/wiki/Q2164465","display_name":"Speculative execution","level":2,"score":0.44657909870147705},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.43400490283966064},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.41191181540489197},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17641302943229675},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.14522841572761536},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ipdpsw.2013.165","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ipdpsw.2013.165","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1519455305","https://openalex.org/W1550371161","https://openalex.org/W1794500012","https://openalex.org/W1976611694","https://openalex.org/W1980385176","https://openalex.org/W2043854189","https://openalex.org/W2044394183","https://openalex.org/W2078429521","https://openalex.org/W2098446267","https://openalex.org/W2103883583","https://openalex.org/W2110161565","https://openalex.org/W2114768063","https://openalex.org/W2135838575","https://openalex.org/W2146781005","https://openalex.org/W2162523628","https://openalex.org/W2170554574","https://openalex.org/W2732422027","https://openalex.org/W4206282990","https://openalex.org/W4237750055","https://openalex.org/W4243104579","https://openalex.org/W4244841987","https://openalex.org/W4246485703","https://openalex.org/W6632772460","https://openalex.org/W6674797009","https://openalex.org/W6675965806"],"related_works":["https://openalex.org/W2340721088","https://openalex.org/W1596526459","https://openalex.org/W2586845463","https://openalex.org/W2118031182","https://openalex.org/W2086779607","https://openalex.org/W2052992886","https://openalex.org/W2375927271","https://openalex.org/W2583056912","https://openalex.org/W2110161565","https://openalex.org/W1528152663"],"abstract_inverted_index":{"Large":[0],"real":[1],"world":[2],"applications":[3],"with":[4,46],"irregular":[5,20,48],"control-flow":[6,21,49,60],"and/or":[7,50],"data-flow":[8,23,51,62],"pose":[9],"challenges":[10],"on":[11,43,55,143,210],"the":[12,57,128,159,167,173,199],"progressive":[13],"improvement":[14],"of":[15],"state-of-the-art":[16],"optimizing":[17],"compilers.":[18],"These":[19],"and":[22,29,38,71,92,110,124,151,185],"are":[24],"often":[25],"not":[26],"compile-time":[27],"analyzable,":[28],"had":[30],"inhibited":[31],"important":[32],"loop":[33,58,76,101,104,106,108,111,115,134,164],"optimizations":[34,77,102,152],"such":[35,47],"as":[36],"parallelization":[37],"vectorization.":[39],"Conventional":[40],"compiler":[41,86,129,149],"techniques":[42,184,201],"parallelizing":[44],"loops":[45,179],"have":[52,187],"mainly":[53],"focused":[54],"eliminating":[56],"carried":[59],"or":[61],"dependencies.":[63],"The":[64,182],"issue":[65],"to":[66,97,131,146,157,176,208],"effectively":[67],"enable":[68,98,132,147,177],"both":[69,90],"control":[70,91,123],"data":[72,93,125],"speculation":[73,94,126,144],"for":[74],"different":[75],"remains":[78],"open.":[79],"This":[80],"paper":[81],"proposes":[82],"a":[83],"new":[84,200],"unified":[85,168],"framework":[87,130,186],"which":[88],"takes":[89],"into":[95],"account":[96],"more":[99,133,178],"aggressive":[100],"including":[103],"parallelization,":[105],"vectorization,":[107],"fusion":[109],"distribution":[112],"through":[113],"mis-speculation-driven":[114],"splitting.":[116],"Our":[117,194],"main":[118],"ideas":[119],"are:":[120],"i)":[121],"unifying":[122],"in":[127,190],"optimizations;":[135],"ii)":[136],"performing":[137],"lazy":[138],"inspection":[139,174],"code":[140,175],"generation":[141],"based":[142],"guards":[145],"later":[148],"analyses":[150],"without":[153],"requiring":[154],"any":[155],"change":[156],"accommodate":[158],"speculative":[160],"information;":[161],"iii)":[162],"driving":[163],"splitting":[165],"using":[166],"mis-speculation":[169],"information":[170],"generated":[171],"by":[172],"being":[180],"parallelized.":[181],"proposed":[183],"been":[188],"implemented":[189],"Intel's":[191],"product":[192],"compiler.":[193],"experimental":[195],"results":[196],"show":[197],"that":[198],"yield":[202],"significant":[203],"performance":[204],"gains":[205],"from":[206],"35%":[207],"62%":[209],"some":[211],"SPEC":[212],"CPU2006":[213],"benchmarks.":[214]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}