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ORCID28th DSD 2025: Salerno, Italy
- 28th Euromicro Conference on Digital System Design, DSD 2025, Salerno, Italy, September 10-12, 2025. IEEE 2025, ISBN 979-8-3315-8499-3
- Robin Sehm, Christian Ewert, Rainer Buchty, Mladen Berekovic, Saleh Mulhem:
Nail: Not Another Fault-Injection Framework for Chisel-generated RTL. 1-7 - Tjark Petersen, Luca Pezzarossa, Martin Schoeberl
:
A Structured Approach to Verification of Digital Hardware in Scala. 8-15 - Yu Yang, Paul Delestrac, Ahmed Hemani:
Modeling and Scheduling of Composable Instruction Set. 16-23 - Faezeh Sadat Saadatmand, Todor P. Stefanov, Andy D. Pimentel, Benny Akesson, Ignacio Gonález Alonso:
Unraveling Parallelism in Automated Workload Modeling for Distributed Cyber-Physical Systems. 24-33 - Federico Buccellato, Corrado De Sio, Sarah Azimi, Luca Sterpone:
On-Hardware Resilience Analysis of DPUAccelerated CNNs on FPGA-Based Systems. 34-41 - Nicolò Bellarmino, Riccardo Cantoro, Martin Huch, Tobias Kilian, Giovanni Squillero:
In-Context Learning for Microcontroller Performance Screening Using Tabular Foundation Models. 42-49 - Martha Schnieber, Rolf Drechsler:
Synthesis for Testability: Polynomial Test Pattern Generation for KFDD Circuits. 50-57 - Louis Ledoux:
Design-Space Exploration of Serialized Floating-Point Division for DLP Architectures. 58-65 - Javier Fernández, Irune Agirre, Irune Yarza, Jon Pérez-Cerrolaza:
Towards a Safe End-to-End AI framework: MISRA C-Compliant YOLO for Object Detection. 66-72 - Carolina Gallardo-Pavesi, Yaime Fernández, Javier E. Soto, Cecilia Hernández, Miguel E. Figueroa:
A streaming algorithm and hardware accelerator for top-K flow detection in network traffic. 73-80 - Kanish R, Komaragiri Sai Vishwanath Rohit, Yash Sengupta, Madhav Rao:
VPSA: A Vectored Processing Element configured Systolic Array Architecture Generator. 81-87 - Rodrigo Olmos, Pedro Lobo, Andrés Otero, Sergio Hernandez, Eduardo Casanueva:
Hardware-aware Decision Tree Ensembles for Radar Data Processing on the Edge with Online Learning. 88-96 - Han Fu, Sigrid Eldh, Kristian Wiklund, Andreas Ermedahl, Philipp Haller, Cyrille Artho:
Auto-repair without test cases: How LLMs fix compilation errors in large industrial embedded code. 97-105 - Hsin-Yu Ting, Sing-Yao Wu, Leming Cheng, Eli Bozorgzadeh:
Dynamic Multi-Accelerator Management for Deep Learning Applications on the FPGA Edge. 106-113 - Johan Plomp, Fokke van Meulen, Juan José López Escobar, Eli De Poorter, Jeroen Hoebeke, Geert Vanstraelen, Michael Rölleke, Roberta Presta, Raúl Santos de La Cámara, Luca Davoli, Jaromír Hubálek:
DistriMuSe - Distributed Multi-Sensor Systems for Human Safety and Health. 114-121 - Anders Lindgren:
Distributed AI Systems at Scale: Reflections from DAIS. 122-129 - Martin Kaiser, Lennart Tigges, Jens Hagemeyer, Christian Klarhorst, Björn Voß, Fred Buining, Bola Fakhoury, János Lazányi, René Griessl, Muhammad Shahzad, Yiannis Georgiou, Salim Mimouni, Pedro Velho, Michael Mercier, Eva Trungel, Julian Gajewski, Stefan Krupop, Michavor Dem Berge, Deepak M. Mathew, Skipis Dimitrios, Arnidis Iordanis, Orestis Vantzos, David Georgantas, Gautier Rouaze, Christoph Bühler, Guido Salvaneschi, Brandon Lewis, Angela Hauber:
CAPE - European Open Compute Architecture for Powerful Edge. 130-137 - Federico Reghenzani, Davide Baroffio, Emilio Corigliano, William Fornaciari, Giancarlo Storti Gajani, Paolo Maffezzoni, Antonino Catanese, Alessandro Balossino, Marco Giuliani:
Software Techniques for Soft Error Resilience: the ASTRAEUS project. 138-144 - Marko S. Andjelkovic, Rizwan Tariq Syed, Alessandro Veronesi, Fabian Vargas, Markus Ulbricht, Leticia Bolzani Poehls, Milos Krstic, Davide Bertozzi, Edward G. Jones, Oliver Rhodes, Riccardo Zese, Michele Favalli, Alice Bizzarri, Evelina Lamma, Marco Gavanelli, Elena Bellodi, Zoran Peric, Jelena Nikolic, Milan R. Dincic, Aleksandra Jovanovic, Dejan Ciric, Nikola Vucic, Sofija Peric, Jelena Jovanovic, Milica Stojanovic, Tatjana R. Nikolic, Goran Nikolic, Jelena Nedeljkovic, Danijel Dankovic, Emilija Zivanovic, Milos Marjanovic, Sandra Veljkovic, Nikola Mitrovic, Bratislav Predic, Tamara Milovanovic:
AIDA4Edge: Twinning for Excellence in Adaptive Edge Artificial Intelligence. 145-152 - Michele Martinelli, Roberto Ammendola, Andrea Biagioni, Carlotta Chiarini, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Elena Pastorelli, Pierpaolo Perticaroli, Luca Pontisso, Cristian Rossi, Francesco Simula, Piero Vicini, David Colin, Grégoire Pichon, Alexandre Louvet, John Gliksberg, Claire Chen, Matteo Turisini, Andrea Monterubbiano, Jean-Philippe Nominé, Denis Dutoit, Hugo Taboada, Lilia Zaourar, Mohamed Benazouz, Angelos Bilas, Fabien Chaix, Manolis Katevenis, Nikolaos Chrysos, Evangelos Mageiropoulos, Christos Kozanitis, Thomas Moen, Steffen Persvold, Einar Rustad, Sandro Fiore, Fabrizio Granelli, Simone Pezzuto, Raffaello Potestio, Luca Tubiana, Philippe Velha, Flavio Vella, Daniele De Sensi, Salvatore Pontarelli:
NET4EXA: Pioneering the Future of Interconnects for Supercomputing and AI. 153-159 - Vít Masek, Vojtech Miskovský, Matús Oleksák:
Building a Side-Channel Attack Scheme on SipHash FPGA Implementation. 160-164 - Eberhard Böhl, Günter Heglmeier:
Artificial Intelligence Enables Increased Data Rate of True Random Number Generator. 165-173 - João Carlos Resende, Ricardo Chaves:
AEGIS+AES folded architecture for FPGA. 174-182 - Lukás Danêk, Vojtech Miskovský, Matús Oleksák:
Side-channel analysis of Chacha20 implemented in software. 183-190 - Marios Papadopoulos, Kostas Lampropoulos, Paris Kitsos:
An FPGA Architecture for Authentication and Key Agreement Protocol for 5G Networks. 191-197 - Jan Dolejs, Martin Jurecek, Róbert Lórencz:
Algebraic Cryptanalysis of Small-Scale Variants of the Bluetooth Stream Cipher E0. 198-205 - Stefano Toscano, Luigi De Simone, Marco Barletta, Marcello Cinque:
PREEMPT-K8S: Pod Prioritization for Mixed-Criticality Edge-Cloud Services. 206-213 - Mario Barbareschi, Salvatore Barone, Nicola Mazzocca, Alberto Moriconi:
Designing Energy-Efficient Approximate Circuits for the FPGA Technology. 214-223 - Jeremy Giesen, Ibai Irigoyen, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Impact of Contention-Aware Placement in Heterogeneous Edge Devices. 224-233 - Shunsuke Ito, Chaoran Zhao, Ryo Okamura, Takuya Azumi:
D-AWSIM: Distributed Autonomous Driving Simulator for Dynamic Map Generation Framework. 234-241 - Giovanni Agosta, Enrico Bini, Davide Baroffio, Carlo Brandolese, Michele Castrovilli, Daniele Cattaneo, Daniele Cesarini, William Fornaciari, Andrea Galimberti, Alberto Garfagnini, Arsenii Gavrikov, Francesco Iannone, Marco Lapegna, Tomas Antonio López, Gabriele Magnani, Gabriele Mencagli, Cecilia Metra, Martin Eugenio Omana, Filippo Palombi, Federico Reghenzani, Josie E. Rodriguez Condia, A. Serafini, Matteo Sonza Reorda, Davide Zoni, Giuseppe Zummo:
Non-Functional Properties in HPC Systems: Design Exploration of Energy, Power, and Reliability. 242-251 - Guilherme Vareiro De Oliveira, Vinicius Pirassoli, Luís Miguel Sousa, Nuno Paulino:
RISC++: Towards an HLS Defined RISC-V SoC. 252-259 - Mahreen Khan, Maria Mushtaq, Renaud Pacalet, Ludovic Apvrille:
Evict+Spec+Time on RISC-V: Gem5-Based Implementation and Microarchitectural Analysis. 260-267 - Côme Allart, Junheng Zheng, Jean-Roch Coulon, André Sintzoff, Olivier Potin, Jean-Baptiste Rigaud:
Eliminating Write-After-Write Hazards to Improve Performance in Embedded Processors. 268-275 - Golnaz Korkian, Neiel Leyva, Arnau Bigas, Noelia Oliete-Escuín, Abbas Haghi, Alireza Monemi, César Fuguet, Lluc Alvarez:
FetchFlare: An Open-Source Strided Data Prefetcher for High-Performance Cache Hierarchies. 276-284 - Arun M, Madhav Rao:
Efficient POSIT Multiplier with Multi-flag Priority Encoding and Multistage Booth Processing. 285-291 - Tobias Scheipel, Maximilian Ogris, Marcel Baunach:
You Shall Not Stall: Achieving RISC-V On-Demand Runtime-Reconfiguration using SCAIE-V. 292-299 - Ahmad Othman, Hueseyin Ege Pamuk, Ahmed Kamaleldin, Diana Göhringer:
Towards an Energy-Efficient RISC-V Core Architecture with Dynamic Dual-Issue and Clock Gating. 300-307 - Carlos E. Hernández, Jesús Barba, José L. Mira, Julián Caba, Fernando Rincón, Juan Carlos López:
Efficient Parallel Rotation of Hyperspectral Images on FPGA-Accelerated Platforms. 308-315 - Alvaro Falcon, Carlos Vega, Gustavo M. Callicó:
Development and Validation of a Low-Cost LEDbased Multispectral Imaging System. 316-323 - Jaume Abella, Irune Agirre, Thanh Hai Bui, Frank Geujen, Gabriele Giordana, Carlo Donzella, Francisco J. Cazorla, Enrico Mezzetti, Axel Brando, Javier Fernández, Irune Yarza, Joanes Plazaola, Robert Lowe, Maria Ulan, Rob Lavreysen, Lucas Tosi, Ilaria Bloise, Lorenzo Feruglio, Ilaria Cinelli, Stefano Lodico, William Guarienti, Giuseppe Nicosia, Valeria Dallara:
SAFEXPLAIN: a Complete Approach Towards Trustworthy AI-Based Safety-Critical Systems. 324-331 - Johan Plomp, Michael Rölleke, Laura Belli, Felipe J. Gil-Castiñeira, Raúl Santos de la Cámara, Roberta Presta, Greet Bilsen, Fokke van Meulen, Luca Davoli, Jaromír Hubálek:
The Story of NextPerception - A survey of the project vision and realisation with examples. 332-341 - Luigi Gallo, Andrea Tuscano, Paolo Giuseppetti, Pietro Amato, Alessandro Solinas, Federico Saluz, Andrea Tessieri, Mario Pedol, Manuel Pernigotto, Massimo Fioravanti, Giovanni Agosta, William Fornaciari, Paolo Maffezzoni, Fabio Salice, Irene Amerini, Francesco Pro, Paolo Satta, Giovanni Trovini:
Enabling Smart Urban Mobility with Edge AI. 342-349 - Norbert Druml, Martin Gschwandtner, Mayeul Jeannin, Rainer Matischek, Edgars Lielamurs, Maksis Celitans, Kaspars Ozols, Nurullah Demiralay, Besir Tayfur, Ismail Sinan Gulbas, Nadir Kucuk, Isa Kiyat, Yahya Nasolo, Jens Uwe Brandt, Noah Christoph Pütz, Thomas Bartz-Beielstein, Jose Isola, Nikola Mandic, Francesca Flamigni, Alexander Kuehhas, Gianluca Brilli, Paolo Burgio, Giacomo Paolieri, Jorge Villagra, Álvaro Flores Cueto, José Antonio Sánchez, Jacopo Sini, Massimo Violante, Lorenzo Giraudi, Paolo Santero, Uwe Kölbel, Moritz Schaffenroth, Panu Sjövall, Jarno Vanne, Morten Larsen, Nergis Gizem Yilmaz, Ziya Uygar Yengin, George Dimitrakopoulos:
ShapeFuture - Technical Progress After Year 1. 350-359 - Giovanni Agosta, Marco Aldinucci, Andrea Bartolini, Laura Bellentani, Andrea Biagioni, Daniele Cesarini, Carlotta Chiarini, Iacopo Colonnelli, Pietro Delugas, Lev Denisov, Ottorino Frezza, Marco Grangetto, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Andrea Maslov, Mauro Olivieri, Pierpaolo Perticaroli, Luca Pontisso, Cristian Rossi, Davide Rossi, Sergio Saponara, Antonio Sciarappa, Francesco Simula, Matteo Sonza Reorda, Massimo Torquati, Piero Vicini:
Towards RISC-V-based HPC: The Italian Pathfinding Activities in the DARE-SGA1 Project. 360-367 - Jakub Lojda, Daire Joyce, Pavel Smrz, Shruti Kathuria, Josef Strnadel, Caitlin Quinn, Václav Simek, Patrik Staron:
Portable Simulation Models for Energy Aspects of IoT Devices in the LoLiPoP-IoT Project. 368-375 - Lukas Leuenberger, Roman Willi, Dorian Amiet, Paul Zbinden:
Glitch Happens: Attacking the AMD-Xilinx PLL with a Clock Glitch Generator. 376-384 - Azzadine Thajte, Sami El Amraoui, Paolo Maistri, Régis Leveugle, Giorgio Di Natale, Laurent Fesquet:
Pulsed ElectroMagnetic Fault Injection Attack on a Time Measurement-based Arbiter-PUF. 385-393 - George Alexakis, Dimitrios Schoinianakis, Giorgos Dimitrakopoulos:
High-Performance Pipelined NTT Accelerators with Homogeneous Digit-Serial Modulo Arithmetic. 394-401 - Nuno Soares, Tiago Carvalho, Luís Miguel Pinho:
Lightweight Performance Monitoring of Real-Time Applications in RISC-V Platforms. 402-409 - John Reuben, Dietmar Fey:
Smart Sensing of Multi-bit Resistive Memory using a Single Reference. 410-417 - Bastien Barbe, Xiao Peng, Anastasia Volkova, Florent de Dinechin:
Towards optimal reconfigurable constant multipliers. 418-425 - Dorian Bourgeoisat, Ulrich Kühne, Florian Brandner:
Execution Platform Contracts. 426-434 - Víctor Soria Pardos, Adrià Armejach, Darío Suárez Gracia, Didier Martinot, Arnaud Grasset, Miquel Moretó:
FLAMA: Architecting Floating-Point Atomic Memory Operations for Heterogeneous HPC Systems. 435-442 - Adam Henault, Philippe Tanguy, Vianney Lapôtre:
LiteInjector: A LiteX Extension for Fault Injection. 443-451 - Petr Bardonek, Marcela Zachariásová:
Leveraging Design Static Analysis for Vertical Reuse in Functional Verification. 452-459 - Alfonso Mascareñas González, Youcef Bouchebaba:
Analysis of Modern Memory Management Unit Functioning for Critical Systems. 460-467 - Rens Baeyens, Dennis Laurijssen, Jan Steckel, Walter Daems:
PhysioEdge: Multimodal Compressive Sensing Platform for Wearable Health Monitoring. 468-474 - Giuseppe Longo, Andrea Fasolino, Rosalba Liguori, Luigi Di Benedetto, Gian Domenico Licciardo, Alfredo Rubino:
ST-HAR: A Single Stretchable Sensor Dataset for Human Activity Recognition. 475-479 - Chiharu Ishii, Naoki Tachibana, Nozomi Yamamoto:
Musculoskeletal Model Analysis for Underwater Assist Suit for Elbow Joint. 480-485 - Fatemeh Akbarian, Robbe Vlaeminck, Joran Verheijen, Amin Aminifar, Amir Aminifar:
Federated Learning for Obstacle Detection to Assist the Visually-Impaired Using Augmented Reality. 486-490 - Andrea Vittimberga, Giovanni Nicolini, Giuseppe Scotti:
A Multi-Channel Threshold-Based Seizure Detection Algorithm for Low-Complexity Hardware Implementation. 491-496 - Frida Sundfeldt, Bianca Widstam, Mahshid Helali Moghadam, Kuo-Yun Liang, Anders Vesterberg:
Alleviating Attack Data Scarcity: SCANIA's Experience Towards Enhancing In-Vehicle Cyber Security Measures. 497-506 - Damas P. Gruska:
Adversarial Analysis and Supervisory Control of Sensor Networks. 507-514 - Johanna Sepúlveda, Dominik Marchsreiter, Filippo Maria Cardano:
Hybrid Quantum-secure Group-based Communication with PQC and QKD. 515-522 - Michael Kühr, Maximilian Mittmann, Mohammad Hamad, Sebastian Steinhorst:
Cati - An Open-Source Framework to Evaluate Attacks on Cameras for Autonomous Vehicles. 523-530 - Fatemeh Shirinzadeh, Abhoy Kole, Kamalika Datta, Saeideh Shirinzadeh, Rolf Drechsler:
A Comprehensive Synthesis and Verification Approach for RRAM-Based Neuromorphic Computing. 531-538 - Mateusz Wasala, Mateusz Smolarczyk, Michal Danilowicz, Tomasz Kryjak:
Hardware-Aware Feature Extraction Quantisation for Real-Time Visual Odometry on FPGA Platforms. 539-548 - Bhavay Arora, Paul Gottschaldt, Ariel Podlubne, Sergio A. Pertuz, Diana Goehringer:
SoC-SLAM: FPGA-Based Hardware/Software Co-Design for Real-Time Visual SLAM Front-End and Back-End Acceleration. 549-557 - Alberto Scionti, Paolo Savio, Francesco Lubrano, Federico Stirano, Antonino Nespola, Olivier Terzo, Corrado De Sio, Luca Sterpone:
Enabling Time-Aware Priority Traffic Management over Distributed FPGA Nodes. 558-565 - Lu Jiang, Zuwen Ou, Diana Göhringer:
Hardware-Level Adaptive Scheduling for Reconfigurable Accelerators on Virtualized FPGAs. 566-573 - Radovan Stojanovic, Jovan Durkovic:
Medical Data Over Sound for Vital Signs Monitoring. 574-577 - Bruna Maria Vittoria Guerra, Roberto Soldi, Lorenzo Vecchi, Stefania Sozzi, Leo Russo, Micaela Schmid, Stefano Ramat:
Fit4MedRob: A Next-Generation Platform for Intelligent Robotic Rehabilitation. 578-585 - Luciano Bozzi, Christian Celidonio, Umberto Nuzzi, Massimo Biagini, Stefano Cherubin, Asbjørn Djupdal, Tor A. Haugdahl, Andrea Aliverti, Alessandra Angelucci, Giovanni Agosta, Gerardo Pelosi, Paolo Belluco, Samuele Polistina, Riccardo Volpi, Luigi Malagò, Michael Schneider, Florian Wieczorek, Xabier Eguiluz:
The CAPSARII Approach to Cyber-Secure Wearable, Ultra-Low-Power Networked Sensors for Soldier Health Monitoring. 586-591 - Mohamad Fakih, Rahul Dharmaji, Halima Bouzidi, Gustavo Quiros Araya, Oluwatosin Ogundare, Mst-Ayesha Siddika, Mohammad Abdullah Al Faruque:
LLM4CVE: Enabling Iterative Automated Vulnerability Repair with Large Language Models. 592-599 - Jan Kleinekathöfer, Rolf Drechsler:
Automatic Polynomial Formal Verification of a Floating-Point Multiplier. 600-607 - Antonio Ras, Antoine Loiseau, Mikaël Carmona, Simon Pontié, Guénaël Renault, Benjamin Smith, Emanuele Valea:
Optimizing HQC using Frobenius Additive FFT on a RISC-V-based System-on-Chip. 608-615 - Ran Huo, Jose Nunez-Yanez:
FPGA-Accelerated Early-Exit Neural Decoder for Quantum Error Correction. 616-624 - Matthieu Rodet, Jean-Luc Béchennec, Mikaël Briday, Sébastien Faucou, Isabelle Puaut, Erven Rohou:
Circadia: Checkpointing for Intermittent Computing in AI Driven Applications. 625-634 - Roozbeh Siyadatzadeh, Fatemeh Mehrafrooz, Nele Mentens, Todor P. Stefanov:
TraceFormer: A Transformer-Based Method for Weight Extraction from AIMC Tiles. 635-642 - Rhuthik P, Deepak Gangadharan:
RL-ALMS: Reinforcement Learning-based Adaptive and Lightweight Model Selection Framework for Energy-Efficient Lane Detection in Electric Vehicles. 643-652 - Patrick Schmidt, Fabian Kreß, Alexey Serdyuk, Matthias Stammler, Tanja Harbaum, Jürgen Becker:
DSEParted: Co-Optimization of Embedded NPU Architectures and Neural Network Partitioning. 653-660
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