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ORCIDCe Guo 0002
Person information
- affiliation: Imperial College London, Department of Computing, UK
Other persons with the same name
- Ce Guo — disambiguation page
- Ce Guo 0001
![[0009-0007-0554-8322]](/https://anthro-https-dblp.org/img/orcid-mark.12x12.png "0009-0007-0554-8322")
— Beijing University of Posts and Telecommunications, State Key Laboratory of Networking and Switching Technology, China - Ce Guo 0003 — Dalian University of Technology, School of Mechanical Engineering, China
Other persons with a similar name
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2020 – today
- 2026
[j12]Hiroaki Ito, Hikari Otsuka, Ryota Yasudo, Zhiqiang Que, José Gabriel F. Coutinho, Daichi Fujiki, Masato Motomura, Ce Guo, Wayne Luk:
Memory-Efficient and Trustworthy Neural Networks via Random Seed-Based Design. IEEE Access 14: 19424-19439 (2026)- [j11]Zhiqiang Que, Jose G. F. Coutinho, Ce Guo, Hongxiang Fan, Wayne Luk:
MetaML-Pro: Cross-Stage Design Flow Automation for Efficient Deep Learning Acceleration. ACM Trans. Reconfigurable Technol. Syst. 19(2): 14:1-14:34 (2026) - [c43]Bowen P. Y. Kwan, Ce Guo, Wayne Luk:
Optimizing FPGA-Based Neural Network Ensemble. ARC 2026: 172-188 - [c42]Guoyu Li, Yang Cao, Lucas H. L. Ng, Alexander Charlton, Qianzhou Wang, Will Punter, Philippos Papaphilippou, Ce Guo, Hongxiang Fan, Wayne Luk, Saman P. Amarasinghe, Ajay Brahmakshatriya:
SPAC: Automating FPGA-based Network Switches with Protocol Adaptive Customization. FCCM 2026: 71-80 - [c41]Zhengyan Liu, Ce Guo, Zehuan Zhang, Qiang Liu, Wayne Luk:
EDSSC: An Efficient FPGA-based Accelerator for Dynamic Sparse Spectral Clustering. FCCM 2026: 281 - [c40]Zhengyan Liu, Ce Guo, Zehuan Zhang, Qiang Liu, Wayne Luk:
CODESCA: Co-Design for Spectral Clustering Acceleration. FPGA 2026: 186 - [c39]Shuang Liang, Yuncheng Lu, Ce Guo, Paul H. J. Kelly, Wayne Luk, Hongxiang Fan:
Advancing Full-Stack Acceleration for SchröDinger-Style Quantum Simulation. HPCA 2026: 1-15 - [c38]Gene Yu, Ce Guo, Wayne Luk:
VCDF: A Validated Consensus-Driven Framework for Time Series Causal Discovery. PAKDD (3) 2026: 29-41 - [i12]Gene Yu, Ce Guo, Wayne Luk:
VCDF: A Validated Consensus-Driven Framework for Time Series Causal Discovery. CoRR abs/2602.21381 (2026) - [i11]Guoyu Li, Yang Cao, Lucas H. L. Ng, Alexander Charlton, Qianzhou Wang, Will Punter, Philippos Papaphilippou, Ce Guo, Hongxiang Fan, Wayne Luk, Saman P. Amarasinghe, Ajay Brahmakshatriya:
SPAC: Automating FPGA-based Network Switches with Protocol Adaptive Customization. CoRR abs/2604.21881 (2026) - [i10]Tong Zhao, Ce Guo, Wayne Luk, Emil Lupu, Ray Dipojjwal:
Learning Temporal Causal Structure via Smooth Differentiable Optimization. CoRR abs/2606.03227 (2026) - 2025
- [j10]Anna Gausen, Ce Guo, Wayne Luk:
An approach to sociotechnical transparency of social media algorithms using agent-based modelling. AI Ethics 5(2): 1827-1845 (2025) - [j9]Jinjin Huang, Ce Guo, Wayne Luk:
ProtoPGTN: A Scalable Prototype-Based Gated Transformer Network for Interpretable Time Series Classification. Inf. 16(12): 1056 (2025) - [c37]Yuncheng Lu, Shuang Liang, Hongxiang Fan, Ce Guo, Wayne Luk, Paul H. J. Kelly:
Versatile Cross-platform Compilation Toolchain for Schrödinger-style Quantum Circuit Simulation. DAC 2025: 1-7 - [c36]Haoran Wu, Ce Guo, Wayne Luk, Robert Mullins:
Aspo: Constraint-Aware Bayesian Optimization for Fpga-Based Soft Processors. FPL 2025: 195-203 - [c35]Zhiqiang Que, Hongxiang Fan, Gabriel F. Figueiredo, Ce Guo, Wayne Luk, Ryota Yasudo, Masato Motomura:
Trustworthy Deep Learning Acceleration with Customizable Design Flow Automation. HEART 2025: 1-13 - [c34]Ce Guo, Tong Zhao:
ResBench: A Resource-Aware Benchmark for LLM-Generated FPGA Designs. HEART 2025: 25-34 - [c33]Angus T. L. Leung, Ce Guo, Wayne Luk:
FABS: An Extensible and High-Performance Digital Twin Framework of AI-Driven Financial Systems. ICAIF 2025: 27-34 - [c32]Lisa Faloughi, Ce Guo, Wayne Luk:
ProtoHedge: Interpretable Hedging with Market Prototypes. ICAIF 2025: 202-210 - [c31]Quoc Anh Nguyen, Ce Guo, Wayne Luk:
Repurposing Language Models for FX Volatility Forecasting: A Data-Efficient and Context-Aware Approach. ICAIF 2025: 465-473 - [i9]Zhiqiang Que, José Gabriel F. Coutinho, Ce Guo, Hongxiang Fan, Wayne Luk:
MetaML-Pro: Cross-Stage Design Flow Automation for Efficient Deep Learning Acceleration. CoRR abs/2502.05850 (2025) - [i8]Ce Guo, Tong Zhao:
ResBench: Benchmarking LLM-Generated FPGA Designs with Resource Awareness. CoRR abs/2503.08823 (2025) - [i7]Yuncheng Lu, Shuang Liang, Hongxiang Fan, Ce Guo, Wayne Luk, Paul H. J. Kelly:
Versatile Cross-platform Compilation Toolchain for Schrödinger-style Quantum Circuit Simulation. CoRR abs/2503.19894 (2025) - [i6]Haoran Wu, Ce Guo, Wayne Luk, Robert Mullins:
ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors. CoRR abs/2506.06817 (2025) - 2024
- [j8]Zhiqiang Que, Minghao Zhang, Hongxiang Fan, He Li, Ce Guo, Wayne Luk:
Low Latency Variational Autoencoder on FPGAs. IEEE J. Emerg. Sel. Topics Circuits Syst. 14(2): 323-333 (2024) - [j7]Kang Gao, Perukrishnen Vytelingum, Stephen Weston, Wayne Luk, Ce Guo:
High-Frequency Financial Market Simulation and Flash Crash Scenarios Analysis: An Agent-Based Modelling Approach. J. Artif. Soc. Soc. Simul. 27(2) (2024) - [j6]Ce Guo, Wayne Luk:
FPGA-Accelerated Sim-to-Real Control Policy Learning for Robotic Arms. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1690-1694 (2024) - [c30]Shuang Liang, Yuncheng Lu, Ce Guo, Wayne Luk, Paul H. J. Kelly:
PCQ: Parallel Compact Quantum Circuit Simulation. FCCM 2024: 24-31 - [c29]Zhiqiang Que, Anyan Zhao, José Gabriel F. Coutinho, Ce Guo, Wayne Luk:
Optimizing DNN Accelerator Compression Using Tolerable Accuracy Loss. ICFPT 2024: 1-2 - [c28]Ce Guo, Haoran Wu, Wayne Luk:
Resource-Constraint Bayesian Optimization for Soft Processors on FPGAs. HEART 2024: 27-36 - [i5]Ziyang Jiao, Ce Guo, Wayne Luk:
Optimizing VarLiNGAM for Scalable and Efficient Time Series Causal Discovery. CoRR abs/2409.05500 (2024) - [i4]Gene Yu, Ce Guo, Wayne Luk:
Robust Time Series Causal Discovery for Agent-Based Model Validation. CoRR abs/2410.19412 (2024) - 2023
- [j5]Anna Gausen, Wayne Luk, Ce Guo:
Using Agent-Based Modelling to Evaluate the Impact of Algorithmic Curation on Social Media. ACM J. Data Inf. Qual. 15(1): 2:1-2:24 (2023) - [c27]Ce Guo, Wayne Luk, Alexander Warren, Joshua M. Levine, Peter Brookes:
Co-Design of Algorithm and FPGA Accelerator for Conditional Independence Test. ASAP 2023: 102-109 - [c26]José Gabriel F. Coutinho, Ce Guo, Tim Todman, Wayne Luk:
Exploring Machine Learning Adoption in Customisable Processor Design. ASICON 2023: 1-4 - [c25]Ce Guo, Diego Cupello, Wayne Luk, Joshua M. Levine, Alexander Warren, Peter Brookes:
FPGA-Accelerated Causal Discovery with Conditional Independence Test Prioritization. FPL 2023: 182-188 - [c24]Zhiqiang Que, Shuo Liu, Markus Rognlien, Ce Guo, José Gabriel F. Coutinho, Wayne Luk:
MetaML: Automating Customizable Cross-Stage Design-Flow for Deep Learning Acceleration. FPL 2023: 248-252 - [c23]Kang Gao, Stephen Weston, Perukrishnen Vytelingum, Namid R. Stillman, Wayne Luk, Ce Guo:
Deeper Hedging: A New Agent-based Model for Effective Deep Hedging. ICAIF 2023: 270-278 - [i3]Zhiqiang Que, Shuo Liu, Markus Rognlien, Ce Guo, José Gabriel F. Coutinho, Wayne Luk:
MetaML: Automating Customizable Cross-Stage Design-Flow for Deep Learning Acceleration. CoRR abs/2306.08746 (2023) - 2022
- [c22]Bowen P. Y. Kwan, Ce Guo, Wayne Luk, Peiyong Jiang:
Light-Weight Permutation Generator for Efficient Convolutional Neural Network Data Augmentation. ARC 2022: 150-165 - [c21]Hongxiang Fan, Ce Guo, Wayne Luk:
Optimizing quantum circuit placement via machine learning. DAC 2022: 19-24 - [c20]Ce Guo, Wayne Luk:
Accelerating Constraint-Based Causal Discovery by Shifting Speed Bottleneck. FPGA 2022: 169-179 - [p2]Wayne Luk, Ce Guo:
FPGA-Based Backpropagation Engine for Feed-Forward Neural Networks. Mach. Learn. under Resour. Constraints Vol. 1 (1) 2022: 250-263 - 2021
- [j4]Ryota Yasudo, José Gabriel de Figueiredo Coutinho, Ana Lucia Varbanescu, Wayne Luk, Hideharu Amano, Tobias Becker, Ce Guo:
Analytical Performance Estimation for Large-Scale Reconfigurable Dataflow Platforms. ACM Trans. Reconfigurable Technol. Syst. 14(3): 12:1-12:21 (2021) - [c19]Lei Fu, Ce Guo, Wayne Luk:
FPGA-accelerated Agent-Based Simulation for COVID-19. AICAS 2021: 1-4 - [c18]Anna Gausen, Wayne Luk, Ce Guo:
Can We Stop Fake News? Using Agent-Based Modelling to Evaluate Countermeasures for Misinformation on Social Media. ICWSM Workshops 2021 - 2020
- [c17]Ce Guo, Wayne Luk, Stephen Weston:
Accelerating Simulation for Agent-based Epidemic Models using FPGAs. AICCSA 2020: 1-8 - [c16]Jiuxi Meng, Ce Guo, Nadeen Gebara, Wayne Luk:
Fast and Accurate Training of Ensemble Models with FPGA-based Switch. ASAP 2020: 81-84 - [c15]Ce Guo, Wayne Luk:
Quantisation-aware Dimensionality Reduction. FPT 2020: 237-240 - [i2]Seyedeh Niusha Alavi Foumani, Ce Guo, Wayne Luk:
An FPGA Accelerated Method for Training Feed-forward Neural Networks Using Alternating Direction Method of Multipliers and LSMR. CoRR abs/2009.02784 (2020) - [i1]Seyedeh Niusha Alavi Foumani, Ce Guo, Wayne Luk:
An Analysis of Alternating Direction Method of Multipliers for Feed-forward Neural Networks. CoRR abs/2009.02825 (2020)
2010 – 2019
- 2019
- [c14]Ce Guo, Wayne Luk, Stanley Qing Shui Loh, Alexander Warren, Joshua M. Levine:
Customisable Control Policy Learning for Robotics. ASAP 2019: 91-98 - [c13]Ce Guo, Wayne Luk, Wenguang Xu:
Non-linear function evaluation reusing matrix-vector multipliers. ASICON 2019: 1-4 - [c12]Cheng Luo, Man-Kit Sit, Hongxiang Fan, Shuanglong Liu, Wayne Luk, Ce Guo:
Towards Efficient Deep Neural Network Training by FPGA-Based Batch-Level Parallelism. FCCM 2019: 45-52 - [c11]Zhiqiang Que, Yanyang Liu, Ce Guo, Xinyu Niu, Yongxin Zhu, Wayne Luk:
Real-Time Anomaly Detection for Flight Testing Using AutoEncoder and LSTM. FPT 2019: 379-382 - 2017
- [j3]Conghui He, Haohuan Fu, Ce Guo, Wayne Luk, Guangwen Yang:
A Fully-Pipelined Hardware Design for Gaussian Mixture Models. IEEE Trans. Computers 66(11): 1837-1850 (2017) - 2016
- [p1]Maciej Kurek, Tobias Becker, Ce Guo, Stewart Denholm, Andreea-Ingrid Funie, Mark Salmon, Tim Todman, Wayne Luk:
Self-aware Hardware Acceleration of Financial Applications on a Heterogeneous Cluster. Self-aware Computing Systems 2016: 241-260 - 2015
- [c10]Liucheng Guo, Ce Guo, David B. Thomas, Wayne Luk:
Pipelined Genetic Propagation. FCCM 2015: 103-110 - [c9]Shengjia Shao, Liucheng Guo, Ce Guo, Thomas C. P. Chau, David B. Thomas, Wayne Luk, Stephen Weston:
Recursive pipelined genetic propagation for bilevel optimisation. FPL 2015: 1-6 - 2014
- [j2]Ce Guo, Wayne Luk:
Pipelined HAC Estimation Engines for Multivariate Time Series. J. Signal Process. Syst. 77(1-2): 117-129 (2014) - [c8]Ce Guo, Wayne Luk, Stephen Weston:
Pipelined reconfigurable accelerator for ordinal pattern encoding. ASAP 2014: 194-201 - [c7]Ce Guo, Wayne Luk:
Accelerating parameter estimation for multivariate self-exciting point processes. FPGA 2014: 181-184 - [c6]Liucheng Guo, David B. Thomas, Ce Guo, Wayne Luk:
Automated framework for FPGA-based parallel genetic algorithms. FPL 2014: 1-7 - [c5]Jinzhe Yang, Ce Guo, Wayne Luk, Terence Nahar:
Collaborative processing of Least-Square Monte Carlo for American options. FPT 2014: 52-59 - [c4]Shengjia Shao, Ce Guo, Wayne Luk, Stephen Weston:
Accelerating transfer entropy computation. FPT 2014: 60-67 - 2013
- [j1]Ce Guo, Wayne Luk, Ekaterina Vinkovskaya, Rama Cont:
Customisable pipelined engine for intensity evaluation in multivariate hawkes point processes. SIGARCH Comput. Archit. News 41(5): 59-64 (2013) - [c3]Ce Guo, Wayne Luk:
Accelerating HAC estimation for multivariate time series. ASAP 2013: 42-49 - [c2]Ce Guo, Wayne Luk:
Accelerating maximum likelihood estimation for Hawkes point processes. FPL 2013: 1-6 - 2012
- [c1]Ce Guo, Haohuan Fu, Wayne Luk:
A fully-pipelined expectation-maximization engine for Gaussian Mixture Models. FPT 2012: 182-189
Coauthor Index
aka: José Gabriel de Figueiredo Coutinho
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