<?xml version="1.0" encoding="US-ASCII"?>
<dblp>
<inproceedings key="conf/intcompsymp/ChengC14" mdate="2017-05-21">
<author>Wei-Kai Cheng</author>
<author>Yen-Heng Ciou</author>
<title>A Data Migration Approach for L1 Cache Design with SRAM and Volatile STT-RAM.</title>
<pages>246-253</pages>
<year>2014</year>
<booktitle>ICS</booktitle>
<ee>https://doi.org/10.3233/978-1-61499-484-8-246</ee>
<crossref>conf/intcompsymp/2014</crossref>
<url>db/conf/intcompsymp/ics2014.html#ChengC14</url>
</inproceedings></dblp>
