<?xml version="1.0"?>
<dblpperson name="Ethan Schuchman" pid="29/45" n="9">
<person key="homepages/29/45" mdate="2009-06-08">
<author pid="29/45">Ethan Schuchman</author>
</person>
<r><inproceedings key="conf/cf/OttoniCHCKSDSW11" mdate="2018-11-06">
<author pid="00/1735">Guilherme Ottoni</author>
<author pid="94/3939">Gautham N. Chinya</author>
<author pid="50/808">Gerolf Hoflehner</author>
<author pid="82/4748">Jamison D. Collins</author>
<author pid="141/4293">Amit Kumar</author>
<author pid="29/45">Ethan Schuchman</author>
<author pid="98/1840">David R. Ditzel</author>
<author pid="65/7863">Ronak Singhal</author>
<author pid="w/HongWang3">Hong Wang 0003</author>
<title>AstroLIT: enabling simulation-based microarchitecture comparison between Intel&#174; and Transmeta designs.</title>
<pages>21</pages>
<year>2011</year>
<booktitle>Conf. Computing Frontiers</booktitle>
<ee>https://doi.org/10.1145/2016604.2016629</ee>
<crossref>conf/cf/2011</crossref>
<url>db/conf/cf/cf2011.html#OttoniCHCKSDSW11</url>
</inproceedings>
</r>
<r><inproceedings key="conf/fpga/SchelleCSWZCPMOHSBSW10" mdate="2025-01-19">
<author pid="82/356">Graham Schelle</author>
<author pid="82/4748">Jamison D. Collins</author>
<author pid="29/45">Ethan Schuchman</author>
<author pid="49/4683">Perry H. Wang</author>
<author pid="45/6753">Xiang Zou</author>
<author pid="94/3939">Gautham N. Chinya</author>
<author pid="52/7863">Ralf Plate</author>
<author pid="23/7863">Thorsten Mattner</author>
<author pid="28/7863">Franz Olbrich</author>
<author pid="93/3629">Per Hammarlund</author>
<author pid="65/7863">Ronak Singhal</author>
<author pid="37/7863">Jim Brayton</author>
<author pid="81/6145">Sebastian Steibl</author>
<author pid="w/HongWang3">Hong Wang 0003</author>
<title>Intel nehalem processor core made FPGA synthesizable.</title>
<pages>3-12</pages>
<year>2010</year>
<booktitle>FPGA</booktitle>
<ee>https://doi.org/10.1145/1723112.1723116</ee>
<ee>https://www.wikidata.org/entity/Q130864398</ee>
<crossref>conf/fpga/2010</crossref>
<url>db/conf/fpga/fpga2010.html#SchelleCSWZCPMOHSBSW10</url>
</inproceedings>
</r>
<r><inproceedings key="conf/fpga/WangCWKSCSSDSW09" mdate="2025-01-19">
<author pid="49/4683">Perry H. Wang</author>
<author pid="82/4748">Jamison D. Collins</author>
<author pid="93/5429">Christopher T. Weaver</author>
<author pid="86/91">Belliappa Kuttanna</author>
<author pid="22/1574">Shahram Salamian</author>
<author pid="94/3939">Gautham N. Chinya</author>
<author pid="29/45">Ethan Schuchman</author>
<author pid="82/3727">Oliver Schilling</author>
<author pid="95/1789">Thorsten Doil</author>
<author pid="81/6145">Sebastian Steibl</author>
<author pid="w/HongWang3">Hong Wang 0003</author>
<title>Intel&#174; atom<sup>TM</sup> processor core made FPGA-synthesizable.</title>
<pages>209-218</pages>
<year>2009</year>
<booktitle>FPGA</booktitle>
<ee>https://doi.org/10.1145/1508128.1508160</ee>
<ee>https://www.wikidata.org/entity/Q130867375</ee>
<crossref>conf/fpga/2009</crossref>
<url>db/conf/fpga/fpga2009.html#WangCWKSCSSDSW09</url>
</inproceedings>
</r>
<r><inproceedings key="conf/IEEEpact/WongBSACWCGJW08" mdate="2021-08-11">
<author pid="93/3783">Henry Wong</author>
<author pid="24/363">Anne Bracy</author>
<author pid="29/45">Ethan Schuchman</author>
<author pid="a/TorMAamodt">Tor M. Aamodt</author>
<author pid="82/4748">Jamison D. Collins</author>
<author pid="49/4683">Perry H. Wang</author>
<author pid="94/3939">Gautham N. Chinya</author>
<author pid="01/3605">Ankur Khandelwal Groen</author>
<author pid="16/3631">Hong Jiang</author>
<author pid="w/HongWang3">Hong Wang 0003</author>
<title>Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor.</title>
<pages>52-61</pages>
<year>2008</year>
<booktitle>PACT</booktitle>
<ee>https://doi.org/10.1145/1454115.1454125</ee>
<ee>https://ieeexplore.ieee.org/document/7849430/</ee>
<crossref>conf/IEEEpact/2008</crossref>
<url>db/conf/IEEEpact/pact2008.html#WongBSACWCGJW08</url>
</inproceedings>
</r>
<r><phdthesis key="phd/us/Schuchman07" mdate="2024-06-26">
<author pid="29/45">Ethan Schuchman</author>
<title>Microarchitecture for defect tolerance and resiliency</title>
<school>Purdue University, USA</school>
<year>2007</year>
<ee>https://docs.lib.purdue.edu/dissertations/AAI3307489</ee>
</phdthesis>
</r>
<r><inproceedings key="conf/dsn/SchuchmanV07" mdate="2023-03-24">
<author pid="29/45">Ethan Schuchman</author>
<author pid="25/4266">T. N. Vijaykumar</author>
<title>BlackJack: Hard Error Detection with Redundant Threads on SMT.</title>
<pages>327-337</pages>
<year>2007</year>
<crossref>conf/dsn/2007</crossref>
<booktitle>DSN</booktitle>
<ee>https://doi.org/10.1109/DSN.2007.23</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/DSN.2007.23</ee>
<url>db/conf/dsn/dsn2007.html#SchuchmanV07</url>
</inproceedings>
</r>
<r><inproceedings key="conf/asplos/SchuchmanV06" mdate="2025-01-19">
<author pid="29/45">Ethan Schuchman</author>
<author pid="25/4266">T. N. Vijaykumar</author>
<title>A program transformation and architecture support for quantum uncomputation.</title>
<pages>252-263</pages>
<year>2006</year>
<crossref>conf/asplos/2006</crossref>
<booktitle>ASPLOS</booktitle>
<ee>https://doi.org/10.1145/1168857.1168889</ee>
<ee>https://doi.org/10.1145/1168918.1168889</ee>
<ee>https://doi.org/10.1145/1168919.1168889</ee>
<ee>https://doi.org/10.1145/1168917.1168889</ee>
<ee>https://www.wikidata.org/entity/Q130928972</ee>
<url>db/conf/asplos/asplos2006.html#SchuchmanV06</url>
</inproceedings>
</r>
<r><inproceedings key="conf/isca/SchuchmanV05" mdate="2023-03-24">
<author pid="29/45">Ethan Schuchman</author>
<author pid="25/4266">T. N. Vijaykumar</author>
<title>Rescue: A Microarchitecture for Testability and Defect Tolerance.</title>
<pages>160-171</pages>
<year>2005</year>
<crossref>conf/isca/2005</crossref>
<booktitle>ISCA</booktitle>
<ee>https://doi.org/10.1109/ISCA.2005.44</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/ISCA.2005.44</ee>
<ee>http://dl.acm.org/citation.cfm?id=1069984</ee>
<url>db/conf/isca/isca2005.html#SchuchmanV05</url>
</inproceedings>
</r>
<r><inproceedings key="conf/micro/PowellSV05" mdate="2022-05-31">
<author pid="06/6128">Michael D. Powell</author>
<author pid="29/45">Ethan Schuchman</author>
<author pid="25/4266">T. N. Vijaykumar</author>
<title>Balancing Resource Utilization to Mitigate Power Density in Processor Pipelines.</title>
<pages>294-304</pages>
<year>2005</year>
<crossref>conf/micro/2005</crossref>
<booktitle>MICRO</booktitle>
<ee>https://doi.org/10.1109/MICRO.2005.14</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/MICRO.2005.14</ee>
<ee>http://dl.acm.org/citation.cfm?id=1100558</ee>
<url>db/conf/micro/micro2005.html#PowellSV05</url>
</inproceedings>
</r>
<coauthors n="29" nc="2">
<co c="0"><na f="a/Aamodt:Tor_M=" pid="a/TorMAamodt">Tor M. Aamodt</na></co>
<co c="0"><na f="b/Bracy:Anne" pid="24/363">Anne Bracy</na></co>
<co c="0"><na f="b/Brayton:Jim" pid="37/7863">Jim Brayton</na></co>
<co c="0"><na f="c/Chinya:Gautham_N=" pid="94/3939">Gautham N. Chinya</na></co>
<co c="0"><na f="c/Collins:Jamison_D=" pid="82/4748">Jamison D. Collins</na></co>
<co c="0"><na f="d/Ditzel:David_R=" pid="98/1840">David R. Ditzel</na></co>
<co c="0"><na f="d/Doil:Thorsten" pid="95/1789">Thorsten Doil</na></co>
<co c="0"><na f="g/Groen:Ankur_Khandelwal" pid="01/3605">Ankur Khandelwal Groen</na></co>
<co c="0"><na f="h/Hammarlund:Per" pid="93/3629">Per Hammarlund</na></co>
<co c="0"><na f="h/Hoflehner:Gerolf" pid="50/808">Gerolf Hoflehner</na></co>
<co c="0"><na f="j/Jiang:Hong" pid="16/3631">Hong Jiang</na></co>
<co c="0"><na f="k/Kumar:Amit" pid="141/4293">Amit Kumar</na></co>
<co c="0"><na f="k/Kuttanna:Belliappa" pid="86/91">Belliappa Kuttanna</na></co>
<co c="0"><na f="m/Mattner:Thorsten" pid="23/7863">Thorsten Mattner</na></co>
<co c="0"><na f="o/Olbrich:Franz" pid="28/7863">Franz Olbrich</na></co>
<co c="0"><na f="o/Ottoni:Guilherme" pid="00/1735">Guilherme Ottoni</na></co>
<co c="0"><na f="p/Plate:Ralf" pid="52/7863">Ralf Plate</na></co>
<co c="1"><na f="p/Powell:Michael_D=" pid="06/6128">Michael D. Powell</na></co>
<co c="0"><na f="s/Salamian:Shahram" pid="22/1574">Shahram Salamian</na></co>
<co c="0"><na f="s/Schelle:Graham" pid="82/356">Graham Schelle</na></co>
<co c="0"><na f="s/Schilling:Oliver" pid="82/3727">Oliver Schilling</na></co>
<co c="0"><na f="s/Singhal:Ronak" pid="65/7863">Ronak Singhal</na></co>
<co c="0"><na f="s/Steibl:Sebastian" pid="81/6145">Sebastian Steibl</na></co>
<co c="1"><na f="v/Vijaykumar:T=_N=" pid="25/4266">T. N. Vijaykumar</na></co>
<co c="0"><na f="w/Wang_0003:Hong" pid="w/HongWang3">Hong Wang 0003</na></co>
<co c="0"><na f="w/Wang:Perry_H=" pid="49/4683">Perry H. Wang</na></co>
<co c="0"><na f="w/Weaver:Christopher_T=" pid="93/5429">Christopher T. Weaver</na></co>
<co c="0"><na f="w/Wong:Henry" pid="93/3783">Henry Wong</na></co>
<co c="0"><na f="z/Zou:Xiang" pid="45/6753">Xiang Zou</na></co>
</coauthors>
</dblpperson>

