close
Skip to main content

Advertisement

Springer Nature Link
Log in
Menu
Find a journal Publish with us Track your research
Search
Saved research
Cart
  1. Home
  2. Software Technologies for Embedded and Ubiquitous Systems
  3. Conference paper

A Single-Path Chip-Multiprocessor System

  • Conference paper
  • pp 47–57
  • Cite this conference paper
Save conference paper
View saved research
Software Technologies for Embedded and Ubiquitous Systems (SEUS 2009)
A Single-Path Chip-Multiprocessor System
  • Martin Schoeberl18,
  • Peter Puschner18 &
  • Raimund Kirner18 

Part of the book series: Lecture Notes in Computer Science ((LNISA,volume 5860))

Included in the following conference series:

  • IFIP International Workshop on Software Technolgies for Embedded and Ubiquitous Systems
  • 1173 Accesses

  • 7 Citations

Abstract

In this paper we explore the combination of a time-predictable chip-multiprocessor system with the single-path programming paradigm. Time-sliced arbitration of the main memory access provides time-predictable memory load and store instructions. Single-path programming avoids control flow dependent timing variations. To keep the execution time of tasks constant, even in the case of shared memory access of several processor cores, the tasks on the cores are synchronized with the time-sliced memory arbitration unit.

Download to read the full chapter text

Chapter PDF

Similar content being viewed by others

Performance Evaluation of RISC-Based Memory-Centric Processor Architecture

Chapter © 2020

Design of Processor in Memory with RISC-modified Memory-Centric Architecture

Chapter © 2017

An extensible framework for multicore response time analysis

Article Open access 18 July 2017

Explore related subjects

Discover the latest articles, books and news in related subjects, suggested using machine learning.
  • Embedded Systems
  • Lab-on-a-Chip
  • Multiagent Systems
  • Register-Transfer-Level Implementation
  • Control Structures and Microprogramming
  • Processor Architectures
  • Real-Time Systems for Multicore Architectures

References

  1. Puschner, P., Burns, A.: Writing temporally predictable code. In: Proc. 7th IEEE International Workshop on Object-Oriented Real-Time Dependable Systems, January 2002, pp. 85–91 (2002)

    Google Scholar 

  2. Puschner, P.: Transforming execution-time boundable code into temporally predictable code. In: Kleinjohann, B., Kim, K.K., Kleinjohann, L., Rettberg, A. (eds.) Design and Analysis of Distributed Embedded Systems, pp. 163–172. Kluwer Academic Publishers, Dordrecht (2002); IFIP 17th World Computer Congress - TC10 Stream on Distributed and Parallel Embedded Systems (DIPES 2002)

    Chapter  Google Scholar 

  3. Allen, J., Kennedy, K., Porterfield, C., Warren, J.: Conversion of Control Dependence to Data Dependence. In: Proc. 10th ACM Symposium on Principles of Programming Languages, January 1983, pp. 177–189 (1983)

    Google Scholar 

  4. Schoeberl, M.: A Java processor architecture for embedded real-time systems. Journal of Systems Architecture 54(1-2), 265–286 (2008)

    Article  Google Scholar 

  5. Pitter, C., Schoeberl, M.: A real-time Java chip-multiprocessor. Trans. on Embedded Computing Sys. (accepted for publication, 2009)

    Google Scholar 

  6. Wellings, A., Schoeberl, M.: Thread-local scope caching for real-time Java. In: Proceedings of the 12th IEEE International Symposium on Object/component/service-oriented Real-time distributed Computing (ISORC 2009), Tokyo, Japan. IEEE Computer Society, Los Alamitos (2009)

    Google Scholar 

  7. Schoeberl, M., Puschner, P.: Is chip-multiprocessing the end of real-time scheduling? In: Proceedings of the 9th International Workshop on Worst-Case Execution Time (WCET) Analysis, Dublin, Ireland, OCG (July 2009)

    Google Scholar 

  8. Pitter, C.: Time-predictable memory arbitration for a Java chip-multiprocessor. In: Proceedings of the 6th International Workshop on Java Technologies for Real-time and Embedded Systems, JTRES 2008 (2008)

    Google Scholar 

  9. Kopetz, H.: Real-Time Systems. Kluwer Academic Publishers, Dordrecht (1997)

    MATH  Google Scholar 

  10. Fohler, G.: Joint scheduling of distributed complex periodic and hard aperiodic tasks in statically scheduled systems. In: Proceedings of the 16th Real-Time Systems Symposium, December 1995, pp. 152–161 (1995)

    Google Scholar 

  11. Andrei, A., Eles, P., Peng, Z., Rosen, J.: Predictable implementation of real-time applications on multiprocessor systems on chip. In: Proceedings of the 21st Intl. Conference on VLSI Design, January 2008, pp. 103–110 (2008)

    Google Scholar 

  12. Rosen, J., Andrei, A., Eles, P., Peng, Z.: Bus access optimization for predictable implementation of real-time applications on multiprocessor systems-on-chip. In: Proceedings of the Real-Time Systems Symposium (RTSS 2007), December 2007, pp. 49–60 (2007)

    Google Scholar 

  13. Lee, E.A.: Computing needs time. Commun. ACM 52(5), 70–79 (2009)

    Article  Google Scholar 

  14. Lickly, B., Liu, I., Kim, S., Patel, H.D., Edwards, S.A., Lee, E.A.: Predictable programming on a precision timed architecture. In: Altman, E.R. (ed.) Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2008), Atlanta, GA, USA, pp. 137–146. ACM, New York (2008)

    Google Scholar 

  15. Schoeberl, M., Korsholm, S., Thalinger, C., Ravn, A.P.: Hardware objects for Java. In: Proceedings of the 11th IEEE International Symposium on Object/component/service-oriented Real-time distributed Computing (ISORC 2008), Orlando, Florida, USA. IEEE Computer Society, Los Alamitos (2008)

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Institute of Computer Engineering, Vienna University of Technology, Austria

    Martin Schoeberl, Peter Puschner & Raimund Kirner

Authors
  1. Martin Schoeberl
    View author publications

    Search author on:PubMed Google Scholar

  2. Peter Puschner
    View author publications

    Search author on:PubMed Google Scholar

  3. Raimund Kirner
    View author publications

    Search author on:PubMed Google Scholar

Editor information

Editors and Affiliations

  1. Electrical and Computer Engineering Division, Pohang University of Science and Technology (POSTECH), San 31 Hyoja Dong, Nam Gu, Pohang, 790-784, Gyeongbuk, South Korea

    Sunggu Lee

  2. Electrical and Computer Engineering Department, Carnegie Mellon University, 5000 Forbes Avenue, 15213-3890, Pittsburgh, PA, USA

    Priya Narasimhan

Rights and permissions

Reprints and permissions

Copyright information

© 2009 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Schoeberl, M., Puschner, P., Kirner, R. (2009). A Single-Path Chip-Multiprocessor System. In: Lee, S., Narasimhan, P. (eds) Software Technologies for Embedded and Ubiquitous Systems. SEUS 2009. Lecture Notes in Computer Science, vol 5860. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-10265-3_5

Download citation

  • .RIS
  • .ENW
  • .BIB
  • DOI: https://doi.org/10.1007/978-3-642-10265-3_5

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-10264-6

  • Online ISBN: 978-3-642-10265-3

  • eBook Packages: Computer ScienceComputer Science (R0)Springer Nature Proceedings Computer Science

Share this paper

Anyone you share the following link with will be able to read this content:

Sorry, a shareable link is not currently available for this article.

Provided by the Springer Nature SharedIt content-sharing initiative

Keywords

  • Execution Time
  • Memory Access
  • Clock Cycle
  • Global Memory
  • Local Cache

These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Publish with us

Policies and ethics

Search

Navigation

  • Find a journal
  • Publish with us
  • Track your research

Footer Navigation

Discover content

  • Journals A-Z
  • Books A-Z
  • Subjects A-Z

Publish with us

  • Journal finder
  • Publish your research
  • Language editing
  • Open access publishing

Products and services

  • Our products
  • Librarians
  • Societies
  • Partners and advertisers

Our brands

  • Springer
  • Nature Portfolio
  • BMC
  • Palgrave Macmillan
  • Apress
  • Discover

Corporate Navigation

  • Your US state privacy rights
  • Accessibility statement
  • Terms and conditions
  • Privacy policy
  • Help and support
  • Legal notice
  • Cancel contracts here

104.23.197.171

Not affiliated

Springer Nature

© 2026 Springer Nature