Abstract
In this paper we explore the combination of a time-predictable chip-multiprocessor system with the single-path programming paradigm. Time-sliced arbitration of the main memory access provides time-predictable memory load and store instructions. Single-path programming avoids control flow dependent timing variations. To keep the execution time of tasks constant, even in the case of shared memory access of several processor cores, the tasks on the cores are synchronized with the time-sliced memory arbitration unit.
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Schoeberl, M., Puschner, P., Kirner, R. (2009). A Single-Path Chip-Multiprocessor System. In: Lee, S., Narasimhan, P. (eds) Software Technologies for Embedded and Ubiquitous Systems. SEUS 2009. Lecture Notes in Computer Science, vol 5860. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-10265-3_5
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DOI: https://doi.org/10.1007/978-3-642-10265-3_5
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-10264-6
Online ISBN: 978-3-642-10265-3
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