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SET and noise fault tolerant circuit design techniques: Application to 7nm FinFET (Q59275484)

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article published in 2014
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    SET and noise fault tolerant circuit design techniques: Application to 7nm FinFET
    article published in 2014

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      SET and noise fault tolerant circuit design techniques: Application to 7nm FinFET (English)
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      J. Vigara
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      A. Rubio
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      April 2014
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      54
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      4
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      738-745
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