A Hardware Attack Secure SRAM: A HAS-16T SRAM Cell Resistant to Side Channel Attacks and Fault-Injection Attacks.

Vaibhav Neema

Priyanka Sharma Nitesh Kumar soni Vaibhav Neema Shailesh Singh Chouhan Rakesh Singhai A Hardware Attack Secure SRAM: A HAS-16T SRAM Cell Resistant to Side Channel Attacks and Fault-Injection Attacks. 2026 April 1331-1342 34 IEEE Trans. Very Large Scale Integr. Syst. 4 https://doi.org/10.1109/TVLSI.2026.3657601 db/journals/tvlsi/tvlsi34.html#SharmasNCS26 streams/journals/tvlsi

Priyanka Sharma Nitesh Kumar soni Vaibhav Neema Shailesh Singh Chouhan Rakesh Singhai Corrections to "A Hardware Attack Secure SRAM: A HAS-16T SRAM Cell Resistant to Side Channel Attacks and Fault-Injection Attacks". 2026 May 1697 34 IEEE Trans. Very Large Scale Integr. Syst. 5 https://doi.org/10.1109/TVLSI.2026.3691186 db/journals/tvlsi/tvlsi34.html#SharmasNCS26a streams/journals/tvlsi

Shubham Kumar Vijay Pratap Sharma Vaibhav Neema Santosh Kumar Vishvakarma DHFP-PE: Dual-Precision Hybrid Floating Point Processing Element for AI Acceleration. 2026 April abs/2604.04507 CoRR https://doi.org/10.48550/arXiv.2604.04507 db/journals/corr/corr2604.html#abs-2604-04507 streams/journals/corr

Priyanka Sharma Vaibhav Neema Shailesh Singh Chouhan Nitesh Kumar soni Radiation-Tolerant SRAM for Satellite Image Compression Systems: A Hybrid Memory Array Approach. 2025 5562-5578 53 Int. J. Circuit Theory Appl. 9 https://doi.org/10.1002/cta.4426 db/journals/ijcta/ijcta53.html#SharmaNCs25 streams/journals/ijcta

Aastha Gupta Ravi Sindal Vaibhav Neema Secure SRAM Memory Design for Secret Data Protection Against Data Imprinting and Power Attack. 2550109:1-2550109:20 2025 March 34 J. Circuits Syst. Comput. 4 https://doi.org/10.1142/S0218126625501099 db/journals/jcsc/jcsc34.html#GuptaSN25 streams/journals/jcsc

Aastha Gupta Ravi Sindal Vaibhav Neema Secure & Reliable 10T SRAM Cell during Read, Write and Hold Operations against Power Analysis Attack. 39:1-39:19 2025 May 30 ACM Trans. Design Autom. Electr. Syst. 3 https://doi.org/10.1145/3718086 db/journals/todaes/todaes30.html#GuptaSN25 streams/journals/todaes

Aastha Gupta Ravi Sindal Vaibhav Neema Memory architecture to mitigate side channel attacks for cryptographic application using loop cut technique. 106374 2024 152 Microelectron. J. https://doi.org/10.1016/j.mejo.2024.106374 db/journals/mj/mj152.html#GuptaSN24 streams/journals/mj

Pushpa Raikwal Ambika Prasad Shah Vaibhav Neema A Low-Leakage Variation-Aware 10T SRAM Cell for IoT Applications. 2150243:1-2150243:21 2021 30 J. Circuits Syst. Comput. 13 https://doi.org/10.1142/S0218126621502431 db/journals/jcsc/jcsc30.html#RaikwalSN21

Prachi Sanvale Neha Gupta Vaibhav Neema Ambika Prasad Shah Santosh Kumar Vishvakarma An improved read-assist energy efficient single ended P-P-N based 10T SRAM cell for wireless sensor network. 2019 92 Microelectron. J. https://doi.org/10.1016/j.mejo.2019.104611 db/journals/mj/mj92.html#SanvaleGNSV19

Anam Sabir Anushree Jain Yashwini Nathwani Vaibhav Neema Intelligent Traffic Light Controller: A Solution for Smart City Traffic Problem. 764-772 2019 VDAT https://doi.org/10.1007/978-981-32-9767-8_63 conf/vdat/2019 db/conf/vdat/vdat2019.html#SabirJNN19 Ambika Prasad Shah Vaibhav Neema Shreeniwas Daulatabad A novel leakage reduction DOIND approach for nanoscale domino logic circuits. 434-438 2015 IC3 https://doi.org/10.1109/IC3.2015.7346720 https://doi.ieeecomputersociety.org/10.1109/IC3.2015.7346720 conf/ic3/2015 db/conf/ic3/ic3-2015.html#ShahND15 Vaibhav Neema Shailesh Singh Chouhan Sanjiv Tokekar Novel circuit technique for reduction of active drain current in low leakage digital VLSI circuits. 843-847 2010 ICWET https://doi.org/10.1145/1741906.1742101 conf/icwet/2010 db/conf/icwet/icwet2010.html#NeemaCT10 Shailesh Singh Chouhan Shreeniwas Daulatabad Aastha Gupta Neha Gupta Anushree Jain Shubham Kumar Yashwini Nathwani Pushpa Raikwal Anam Sabir Prachi Sanvale Ambika Prasad Shah Priyanka Sharma Vijay Pratap Sharma Ravi Sindal Rakesh Singhai Nitesh Kumar soni Sanjiv Tokekar Santosh Kumar Vishvakarma