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ORCIDRuiqi Chen 0001
Person information
- affiliation: Fudan University, Shanghai, China
Other persons with the same name
- Ruiqi Chen — disambiguation page
- Ruiqi Chen 0002
![[0000-0001-7770-9307]](/web/20180317132104*/https://developer.android.com/reference/java/sql/package-https-dblp.org/img/orcid-mark.12x12.png "0000-0001-7770-9307")
— Washington University in St. Louis, MO, USA - Ruiqi Chen 0003 — Soochow University, Suzhou, China
- Ruiqi Chen 0004 — University of Washington, Seattle, WA, USA (and 1 more)
- Ruiqi Chen 0005 — Beijing University of Posts and Telecommunications, Beijing, China
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2020 – today
- 2026
[j16]Han Bao, Xingyu Liu, Xiaoke Wang, Ahmed Sadaqa, Yanxiang Zhu, Shidi Tang, Ruiqi Chen, Ming Ling, Bruno da Silva:
BenDan: Benchmarking DPU performance on FPGAs. Integr. 109: 102695 (2026)- [j15]Ruiqi Chen, Yangxintong Lyu, Han Bao, Shidi Tang, Jindong Li, Yanxiang Zhu, Ming Ling, Bruno da Silva:
FP8ApproxLib: An FPGA-based approximate multiplier library for 8-bit floating point. J. Syst. Archit. 173: 103686 (2026) - [j14]Yang Liu, Shuyang Li, Yu Li, Ruiqi Chen, Shun Li, Jun Yu, Kun Wang:
DIF-LUT Pro: An Automated Tool for Simple yet Scalable Approximation of Nonlinear Activation on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 45(1): 295-308 (2026) - [j13]Shidi Tang, Ruiqi Chen, Rui Liu, Yuxuan Lv, Pengwei Zheng, He Li, Ming Ling:
Diff-Acc: An Efficient FPGA Accelerator for Unconditional Diffusion Models. ACM Trans. Embed. Comput. Syst. 25(3): 48:1-48:21 (2026) - [j12]Han Bao, Shidi Tang, Jingdong Li, Ahmed Sadaqa, Ruiqi Chen, Ming Ling, Bruno da Silva:
FANE: FPGA-Based FP8 Approximate Neural Network Engine. IEEE Trans. Very Large Scale Integr. Syst. 34(6): 2015-2019 (2026) - [c18]Shidi Tang, Chuanzhao Zhang, Ruiqi Chen, Yuxuan Lv, Bruno da Silva, Ming Ling:
Equicore: Accelerating Clebsch-Gordan Tensor Product of Equivariant Neural Networks on FPGA. DATE 2026: 1-7 - [c17]Ankun Tian, Shidi Tang, Ruiqi Chen, Ming Ling:
Breaking the BRAM Wall: Scalable Vina FPGA Acceleration via Distributed Grid Storage and Cross-Board Long-Ring Pipelines. DATE 2026: 1-7 - [c16]Ahmed Sadaqa, Brent De Weerdt, Ruiqi Chen, Nikos Deligiannis, Bruno da Silva:
Power-Efficient Spiking Conversion of Deep Unfolded Transformers. ISCAS 2026: 499-503 - [c15]Abdessamad Nassihi, Ahmed Sadaqa, Muhammad Iqbal Khan, Han Bao, Ruiqi Chen, Bruno da Silva:
IDSPfree: An FPGA-Based Intrusion Detection System with DSP-Free Design. ISCAS 2026: 3067-3071 - [c14]Shuyang Li, Hanqing Zhang, Ruiqi Chen, Bruno da Silva, Giorgian Borca-Tasciuc, Dantong Yu, Cong Callie Hao:
TrackGNN: A Highly Parallelized and Self-Adaptive GNN Accelerator for Track Reconstruction on FPGAs. ISQED 2026: 1-8 - 2025
- [j11]Ming Ling, Shidi Tang, Ruiqi Chen, Xin Li, Yanxiang Zhu:
Vina-FPGA2: a high-level parallelized hardware-accelerated molecular docking tool based on the inter-module pipeline. Frontiers Inf. Technol. Electron. Eng. 26(11): 2215-2230 (2025) - [j10]Ming Ling, Chuanzhao Zhang, Shidi Tang, Ruiqi Chen, Yanxiang Zhu:
EEVS: Redeploying Discarded Smartphones for Economic and Ecological Drug Molecules Virtual Screening. IEEE Trans. Sustain. Comput. 10(5): 830-842 (2025) - [j9]Jiayu Liu, Yuanhang Li, Zhengyang Huang, Chao Chen, Ruiqi Chen, Bruno da Silva:
FASE: An FPGA-Based Accelerator for Lightweight Sample Entropy With Monte Carlo Sampling. IEEE Trans. Very Large Scale Integr. Syst. 33(10): 2883-2896 (2025) - [c13]Ruiqi Chen, Jiayu Liu, Shidi Tang, Yang Liu, Yanxiang Zhu, Ming Ling, Bruno da Silva:
ATE-GCN: An FPGA-Based Graph Convolutional Network Accelerator with Asymmetrical Ternary Quantization. DATE 2025: 1-6 - [c12]Ruiqi Chen, Yangxintong Lyu, Han Bao, Jiayu Liu, Yanxiang Zhu, Shidi Tang, Ming Ling, Bruno da Silva:
FPGA-Based Approximate Multiplier for FP8. FCCM 2025: 1-9 - [c11]Shuyang Li, Hanqing Zhang, Ruiqi Chen, Bruno da Silva, Giorgian Borca-Tasciuc, Dantong Yu, Cong Hao:
TrackGNN: A Highly Parallelized and Self-Adaptive GNN Accelerator for Track Reconstruction on FPGAs. FCCM 2025: 269 - [c10]Jindong Li, Tenglong Li, Ruiqi Chen, Guobin Shen, Dongcheng Zhao, Qian Zhang, Yi Zeng:
Hummingbird: A Smaller and Faster Large Language Model Accelerator on Embedded FPGA. ICCAD 2025: 1-9 - [c9]Shidi Tang, Pengwei Zheng, Ruiqi Chen, Yuxuan Lv, Bruno da Silva, Ming Ling:
Diff-DiT: Temporal Differential Accelerator for Low-bit Diffusion Transformers on FPGA. ICCAD 2025: 1-9 - [i2]Jindong Li, Tenglong Li, Ruiqi Chen, Guobin Shen, Dongcheng Zhao, Qian Zhang, Yi Zeng:
Hummingbird: A Smaller and Faster Large Language Model Accelerator on Embedded FPGA. CoRR abs/2507.03308 (2025) - 2024
- [j8]Ming Ling, Zhihao Feng, Ruiqi Chen, Yi Shao, Shidi Tang, Yanxiang Zhu:
Vina-FPGA-Cluster: Multi-FPGA Based Molecular Docking Tool With High-Accuracy and Multi-Level Parallelism. IEEE Trans. Biomed. Circuits Syst. 18(6): 1321-1337 (2024) - [j7]Enhao Tang, Shun Li, Ruiqi Chen, Hao Zhou, Yuhanxiao Ma, Haoyang Zhang, Jun Yu, Kun Wang:
Graph-OPU: A Highly Flexible FPGA-Based Overlay Processor for Graph Neural Networks. ACM Trans. Reconfigurable Technol. Syst. 17(4): 58:1-58:33 (2024) - [j6]Yajing Liu, Ruiqi Chen, Shuyang Li, Jing Yang, Shun Li, Bruno da Silva:
FPGA-Based Sparse Matrix Multiplication Accelerators: From State-of-the-Art to Future Opportunities. ACM Trans. Reconfigurable Technol. Syst. 17(4): 59:1-59:37 (2024) - [c8]Shun Li, Ruiqi Chen, Enhao Tang, Yajing Liu, Jing Yang, Kun Wang:
S-LGCN: Software-Hardware Co-Design for Accelerating LightGCN. DATE 2024: 1-6 - [i1]Ruiqi Chen, Yangxintong Lyu, Han Bao, Bruno da Silva:
A Power-Efficient Hardware Implementation of L-Mul. CoRR abs/2412.18948 (2024) - 2023
- [j5]Ming Ling, Qingde Lin, Ruiqi Chen, Haimeng Qi, Mengru Lin, Yanxiang Zhu, Jiansheng Wu:
Vina-FPGA: A Hardware-Accelerated Molecular Docking Tool With Fixed-Point Quantization and Low-Level Parallelism. IEEE Trans. Very Large Scale Integr. Syst. 31(4): 484-497 (2023) - [c7]Ruiqi Chen, Haoyang Zhang, Yuhanxiao Ma, Enhao Tang, Shun Li, Yanxiang Zhu, Jun Yu, Kun Wang:
Graph-OPU: An FPGA-Based Overlay Processor for Graph Neural Networks. FPGA 2023: 49 - [c6]Ruiqi Chen, Haoyang Zhang, Shun Li, Enhao Tang, Jun Yu, Kun Wang:
Graph-OPU: A Highly Integrated FPGA-Based Overlay Processor for Graph Neural Networks. FPL 2023: 228-234 - [c5]Ruiqi Chen, Haoyang Zhang, Jun Yu, Kun Wang:
FPGA Accelerating Multi-Source Transfer Learning with GAT for Bioactivities of Ligands Targeting Orphan G Protein-Coupled Receptors. FPL 2023: 317-321 - [c4]Yueyin Bai, Hao Zhou, Ruiqi Chen, Kuangjie Zou, Jialin Cao, Haoyang Zhang, Jianli Chen, Jun Yu, Kun Wang:
g-BERT: Enabling Green BERT Deployment on FPGA via Hardware-Aware Hybrid Pruning. ICC 2023: 1706-1711 - [c3]Ruiqi Chen, Haoyang Zhang, Yu Li, Runzhou Zhang, Guoyu Li, Jun Yu, Kun Wang:
Edge FPGA-based Onsite Neural Network Training. ISCAS 2023: 1-5 - [c2]Ruiqi Chen, Haoyang Zhang, Yuhanxiao Ma, Jianli Chen, Jun Yu, Kun Wang:
eSSpMV: An Embedded-FPGA-based Hardware Accelerator for Symmetric Sparse Matrix-Vector Multiplication. ISCAS 2023: 1-5 - 2022
- [j4]Chao Chen, Bruno da Silva, Ruiqi Chen, Shun Li, Jianqing Li, Chengyu Liu:
Evaluation of Fast Sample Entropy Algorithms on FPGAs: From Performance to Energy Efficiency. Entropy 24(9): 1177 (2022) - [j3]Shizhen Huang, Anhua Guo, Kaikai Su, Siyu Chen, Ruiqi Chen:
Implementation of quasi-Newton algorithm on FPGA for IoT endpoint devices. Int. J. Secur. Networks 17(2): 124-134 (2022) - [j2]Shun Li, Yuxuan Tao, Enhao Tang, Ting Xie, Ruiqi Chen:
A survey of field programmable gate array (FPGA)-based graph convolutional neural network accelerators: challenges and opportunities. PeerJ Comput. Sci. 8: e1166 (2022) - [c1]Ruiqi Chen, Yuhanxiao Ma, Shaodong Zheng, Shizhen Huang, Chao Chen, Jun Yu, Kun Wang:
Biological Activity Prediction of GPCR-targeting Ligands on Heterogeneous FPGA-based Accelerators. FCCM 2022: 1 - 2021
- [j1]Wei Jiang, Yuhanxiao Ma, Ruiqi Chen:
Gutter oil detection for food safety based on multi-feature machine learning and implementation on FPGA with approximate multipliers. PeerJ Comput. Sci. 7: e774 (2021)
Coauthor Index
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