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2020 – today
- 2024
[c8]Jeongyoon Wie
, Sangwoo Jung, Taeryoung Seol, Geunha Kim, Sehwan Lee, Homin Jang, Samhwan Kim, Yeonjae Shin, Jae Eun Jang, Jaeha Kung, Arup K. George, Junghyup Lee:
A 3.3-to-11V-Supply-Range 10μW/Ch Arbitrary-Waveform-Capable Neural Stimulator with Output-Adaptive-Self-Bias and Supply-Tracking Schemes in 0.18μm Standard CMOS. CICC 2024: 1-2- [c7]Taeryoung Seol, Geunha Kim, Sehwan Lee, Samhwan Kim, Dongwook Kim, Jeongyoon Wie, Yeonjae Shin, Hongki Kang, Jae Eun Jang, Arup K. George, Junghyup Lee:
33.11 A Hybrid Recording System with 10kHz-BW 630mVPP 84.6dB-SNDR 173.3dB-FOMSNDR and 5kHz-BW 114dB-DR for Simultaneous ExG and Biocurrent Acquisition. ISSCC 2024: 562-564 - [c6]Sehwan Lee, Taeryoung Seol, Geunha Kim, Minyoung Song, Gain Kim, Jong-Hyeok Yoon, Arup K. George, Junghyup Lee:
A 97dB-PSRR 178.4dB-FOMDR Calibration-Free VCO-ΔΣ ADC Using a PVT-Insensitive Frequency-Locked Differential Regulation Scheme for Multi-Channel ExG Acquisition. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c5]Taeryoung Seol, Sehwan Lee, Geunha Kim, Samhwan Kim, Euiseong Kim, Seungyeob Baik, Jaeha Kung, Ji-Woong Choi, Arup K. George, Junghyup Lee:
A 1V 136.6dB-DR 4kHz-BW $\Delta\Sigma$ Current-to-Digital Converter with a Truncation-Noise-Shaped Baseline-Servo-Loop in 0.18\mu\mathrm{m}$ CMOS. ISSCC 2023: 482-483 - [c4]Geunha Kim, Sehwan Lee, Taeryoung Seol, Seungyeob Baik, Yeonjae Shin, Gain Kim, Jong-Hyeok Yoon, Arup K. George, Junghyup Lee:
A 1V-Supply $1.85\mathrm{V}_{\text{PP}}$ -Input-Range 1kHz-BW 181.9dB-FOMDR179.4dB-FOMSNDR 2nd-Order Noise-Shaping SAR-ADC with Enhanced Input Impedance in 0.18μm CMOS. ISSCC 2023: 484-485 - 2022
- [c3]Sehwan Lee, Yoonsung Choi, Geunha Kim, Seungyeob Baik, Taeryoung Seol, Homin Jang, Doyoung Lee, Minkyu Je, Ji-Woong Choi, Arup K. George, Junghyup Lee:
A 0.7V 17fJ/Step-FOMW 178.1dB-FOMSNDR 10kHz-BW 560mVPP True-ExG Biopotential Acquisition System with Parasitic-Insensitive 421MΩ Input Impedance in 0.18μm CMOS. ISSCC 2022: 336-338 - [c2]Seungyeob Baik, Taeryoung Seol, Sehwan Lee, Geunha Kim, SeongHwan Cho, Arup K. George, Junghyup Lee:
A 2.54μJ∙ppm2-FOMS Supply- and Temperature-Independent Time-Locked ΔΣ Capacitance-to-Digital Converter in 0.18-μm CMOS. VLSI Technology and Circuits 2022: 114-115
2010 – 2019
- 2018
- [c1]Taeryoung Seol, Sehwan Lee, Junghyup Lee:
A Wearable Electrocardiogram Monitoring System Robust to Motion Artifacts. ISOCC 2018: 241-242
Coauthor Index
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